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    DEVICE, SYSTEM AND METHOD TO DELIVER POWER WITH PHASE CIRCUITS OF AN INTEGRATED CIRCUIT DIE
    1.
    发明公开
    DEVICE, SYSTEM AND METHOD TO DELIVER POWER WITH PHASE CIRCUITS OF AN INTEGRATED CIRCUIT DIE 审中-公开

    公开(公告)号：US20230421040A1

    公开(公告)日：2023-12-28

    申请号：US17851997

    申请日：2022-06-28

    Applicant: Intel Corporation

    Inventor： Tamir Salus ,  Shunjiang Xu ,  Christopher Schaef

    IPC: H02M1/00 ,  H02M1/088 ,  H02M3/155

    CPC classification number: H02M1/0043 ,  H02M1/088 ,  H02M3/155 ,  H02M1/0012

    Abstract: Techniques and mechanisms for facilitating a scalable delivery of current to an inductor of a voltage regulator. In an embodiment, a hardware interface of integrated circuit (IC) die accommodates coupling of the IC die to multiple inductors. The hardware interface comprises contacts which are each to couple the IC die to a respective one of the multiple inductors. A phase circuit of the IC die includes multiple cells which are each coupled to a different respective contact of a plurality of contacts of the hardware interface. A digital controller of the IC die is operable to select any of various combinations of the multiple cells each to conduct a respective current with a corresponding one of the plurality of contacts. In another embodiment, the plurality of contacts are arranged as a multi-row, multi-column array.

    PHASE CURRENT BALANCE ARCHITECTURE FOR A MULTI-PHASE POWER CONVERTER
    4.
    发明公开
    PHASE CURRENT BALANCE ARCHITECTURE FOR A MULTI-PHASE POWER CONVERTER 审中-公开

    公开(公告)号：US20240297586A1

    公开(公告)日：2024-09-05

    申请号：US18177426

    申请日：2023-03-02

    Applicant: Intel Corporation

    Inventor： Keng Chen ,  Shunjiang Xu ,  Christopher Schaef ,  Tamir Salus ,  Kishan Joshi ,  Arvind Raghavan ,  Huanhuan Zhang

    IPC: H02M3/158 ,  G06F1/26

    CPC classification number: H02M3/1584 ,  G06F1/26

    Abstract: Embodiments described herein may include apparatus, systems, techniques, and/or processes that are directed to multiphase power converters and how current level outputs of each phase circuit are calibrated. The multiple phase circuits are grouped into multiple subsets, wherein one phase circuit of each subset is designated as a reference phase circuit. The reference phase circuits of each subset are calibrated together, using, for example, a closed loop daisy chain technique where each reference phase circuit calibrates their current output to the current output of the previous phase circuit, or alternatively, a current averaging technique where each reference phase circuit balances their current output to the average output of the reference phase circuits. The other phase circuits in each subset calibrate their current level outputs to the reference phase circuits in their subset using, for example, an open loop daisy chain technique, a reference/follower technique or by calibrating their output to the average output of the reference phase circuits.

    Multiple output voltage conversion
    6.
    发明授权
    Multiple output voltage conversion 有权

    公开(公告)号：US11411491B2

    公开(公告)日：2022-08-09

    申请号：US16642853

    申请日：2017-09-29

    Applicant: Intel Corporation

    Inventor： Vivek De ,  Krishnan Ravichandran ,  Harish Krishnamurthy ,  Khondker Ahmed ,  Sriram Vangal ,  Vaibhav Vaidya ,  Turbo Majumder ,  Christopher Schaef ,  Suhwan Kim ,  Xiaosen Liu ,  Nachiket Desai

    IPC: H02M3/158 ,  H02M3/07 ,  H02M1/00

    Abstract: Voltage dividing circuitry is provided for use in a voltage converter for converting at least one input Direct Current, DC voltage to a plurality of output DC voltages. The voltage dividing circuitry including a voltage input port to receive an input DC voltage and an inductor having an input-side switch node and an output-side switch node. The output side switch node is connectable to one of a plurality of voltage output ports to supply a converted value of the input DC voltage as an output DC voltage. The flying capacitor interface has a plurality of switching elements and at least one flying capacitor, the flying capacitor interface to divide the input DC voltage to provide a predetermined fixed ratio of the input DC voltage at the input-side switch node of the inductor. A voltage converter and a power management integrated circuit having the voltage dividing circuitry are also provided.

    Reference Voltage Generation
    7.
    发明申请
    Reference Voltage Generation 审中-公开

    公开(公告)号：US20190199206A1

    公开(公告)日：2019-06-27

    申请号：US15855683

    申请日：2017-12-27

    Applicant: INTEL CORPORATION

    Inventor： Christopher Schaef ,  Vaibhav Vaidya ,  Suhwan Kim

    IPC: H02M3/07 ,  H03B5/04 ,  H03K3/011 ,  H02M3/28

    Abstract: In some examples, an apparatus for reference voltage generation includes a plurality of reference voltage rails each with a corresponding reference voltage, a first controller, and a second controller. The first controller is to cycle through the plurality of reference voltage rails and maintain the reference voltages in a synchronous mode. The second controller is to detect an event and provide an indication to the first controller to update in an asynchronous mode one of the plurality of reference voltages in response to the event. The first controller is to update in an asynchronous mode the one of the plurality of reference voltages in response to the event.

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