公开(公告)号：US09848510B2

公开(公告)日：2017-12-19

申请号：US14578037

申请日：2014-12-19

Applicant: Intel Corporation

Inventor： Vijaykumar Krithivasan ,  Jeffory L. Smalley ,  David J. Llapitan ,  Gaurav Chawla ,  Mani Prakash ,  Susan F. Smith

IPC: H01L23/32 ,  H05K7/20 ,  H01L23/36 ,  H01L23/40

CPC classification number: H05K7/2039 ,  H01L23/32 ,  H01L23/36 ,  H01L23/40 ,  H01L2924/0002 ,  H05K2201/10378 ,  H05K2201/1056 ,  H01L2924/00

Abstract: Embodiments of the present disclosure are directed towards a socket loading element and associated techniques and configurations. In one embodiment, an apparatus may include a loading element configured to transfer a compressive load from a heat spreader to a socket assembly, wherein the loading element is configured to form a perimeter around a die when the loading element is coupled with an interposer disposed between the die and the socket assembly and wherein the loading element includes an opening configured to accommodate the die. Other embodiments may be described and/or claimed.

公开(公告)号：US09603276B2

公开(公告)日：2017-03-21

申请号：US14583372

申请日：2014-12-26

Applicant: Intel Corporation

Inventor： David J. Llapitan ,  Jeffory L. Smalley ,  Gaurav Chawla ,  Joshua D Heppner ,  Vijaykumar Krithivasan ,  Jonathan W. Thibado ,  Kuang Liu ,  Gregorio Murtagian

IPC: H01R12/00 ,  H05K7/10

CPC classification number: H05K7/1084

Abstract: Some forms relate to an electronic assembly that includes a plurality of electronic package. The electronic assembly includes a frame and a first electronic package mounted on the frame. The first electronic package includes a first pin grid array. The electronic assembly further includes a second electronic package mounted on the frame. The second electronic package includes a second pin grid array. The electronic assembly further includes an actuation mechanism on the frame. The actuation mechanism is configured to move the first electronic package and the second electronic package relative to the frame during operation of the actuation mechanism.

公开(公告)号：US09265170B2

公开(公告)日：2016-02-16

申请号：US14065281

申请日：2013-10-28

Applicant: INTEL CORPORATION

Inventor： Rajasekaran Swaminathan ,  Ram S. Viswanath ,  Sanka Ganesan ,  Gaurav Chawla ,  Joshua D. Heppner ,  Jeffory L. Smalley ,  Vijaykumar Krithivasan ,  David J. Llapitan ,  Neal E. Ulen ,  Donald T. Tran

IPC: H01R12/00 ,  H05K1/00 ,  H05K7/10 ,  H01R12/71 ,  H01R13/24

CPC classification number: H05K7/10 ,  H01R12/00 ,  H01R12/716 ,  H01R13/2442 ,  H05K1/00 ,  Y10T29/49169

Abstract: Embodiments related to integrated circuit (IC) connectors are described. In some embodiments, an IC assembly may include an IC package substrate, an intermediate member, and a male connector. The IC package substrate may have first signal contacts on a top or bottom surface, and the bottom surface may have second signal contacts for coupling with a socket on a circuit board. The intermediate member may have a first end coupled to the first signal contacts and a second end extending beyond the side surface. The male connector may be disposed at the second end of the intermediate member, and may have signal contacts coupled to the signal contacts of the intermediate member. The male connector may be mateable with a female connector when the female connector is brought into engagement in a direction parallel to the axis of the intermediate member. Other embodiments may be disclosed and/or claimed.

Abstract translation: 描述了与集成电路（IC）连接器相关的实施例。 在一些实施例中，IC组件可以包括IC封装衬底，中间构件和阳连接器。 IC封装基板可以在顶表面或底表面上具有第一信号触点，并且底表面可以具有用于与电路板上的插座耦合的第二信号触点。 中间构件可以具有联接到第一信号触头的第一端和延伸超过侧表面的第二端。 阳连接器可以设置在中间构件的第二端处，并且可以具有联接到中间构件的信号触点的信号触点。 当阴连接器沿平行于中间构件的轴线的方向接合时，阳连接器可与母连接器配合。 可以公开和/或要求保护其他实施例。

公开(公告)号：US20150162719A1

公开(公告)日：2015-06-11

申请号：US14626648

申请日：2015-02-19

Applicant: Intel Corporation

Inventor： Gaurav Chawla ,  Vijaykumar Krithivasan ,  Joshua D. Heppner

IPC: H01R43/20

CPC classification number: H01R43/20 ,  H01R24/86 ,  H05K7/1084 ,  Y10T29/4922

Abstract: An apparatus for coupling an integrated circuit to other electronics can include a housing having an exterior and an interior, the exterior having an exterior bottom surface, the interior defined by an interior bottom surface opposite the exterior bottom surface, and at least one sidewall extending away from the interior bottom surface to define an interior shape that is sized to receive the integrated circuit, with the integrated circuit disposed against the interior bottom surface and the at least one sidewall. The example can include a plurality of exterior contacts exposed along the exterior bottom surface in an exterior contact pattern that is generally circular in shape.

Abstract translation: 用于将集成电路耦合到其它电子设备的装置可以包括具有外部和内部的外壳，外部具有外部底部表面，内部由与外部底部表面相对的内部底部表面限定，并且至少一个侧壁延伸远离 从内部底部表面限定尺寸适于接收集成电路的内部形状，其中集成电路抵靠内部底部表面和至少一个侧壁设置。 该示例可以包括沿着外部底部表面暴露的多个外部接触件，外部接触图案通常为圆形形状。