公开(公告)号：US20230195346A1

公开(公告)日：2023-06-22

申请号：US18109774

申请日：2023-02-14

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Evan Custodio ,  Susanne M. Balle ,  Joe Grecco ,  Henry Mitchel ,  Slawomir Putyrski

IPC: G06F3/06 ,  G06F16/174 ,  G06F21/57 ,  G06F21/73 ,  G06F8/65 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/12 ,  H04L67/10 ,  G06F11/30 ,  G06F9/50 ,  H01R13/453 ,  G06F9/48 ,  G06F9/455 ,  H05K7/14 ,  H04L61/5007 ,  H04L67/63 ,  H04L67/75 ,  H03M7/30 ,  H03M7/40 ,  H04L43/08 ,  H04L47/20 ,  H04L47/2441 ,  G06F11/07 ,  G06F11/34 ,  G06F7/06 ,  G06T9/00 ,  H03M7/42 ,  H04L12/28 ,  H04L12/46 ,  G06F13/16 ,  G06F21/62 ,  G06F21/76 ,  H03K19/173 ,  H04L9/08 ,  H04L41/044 ,  H04L49/104 ,  H04L43/04 ,  H04L43/06 ,  H04L43/0894 ,  G06F9/38 ,  G06F12/02 ,  G06F12/06 ,  G06T1/20 ,  G06T1/60 ,  G06F9/54 ,  H04L67/1014 ,  G06F8/656 ,  G06F8/658 ,  G06F8/654 ,  G06F9/4401 ,  H01R13/631

CPC classification number: G06F3/0641 ,  G06F16/1744 ,  G06F21/57 ,  G06F21/73 ,  G06F8/65 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/12 ,  H04L67/10 ,  G06F11/3079 ,  G06F9/5005 ,  H01R13/4536 ,  H01R13/453 ,  G06F9/5044 ,  G06F9/4843 ,  G06F9/45533 ,  G06F9/5083 ,  H05K7/1491 ,  H04L61/5007 ,  H04L67/63 ,  H04L67/75 ,  G06F3/0608 ,  G06F3/065 ,  G06F3/067 ,  H03M7/6017 ,  H03M7/60 ,  H03M7/40 ,  H03M7/6011 ,  H03M7/6029 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0617 ,  G06F3/0647 ,  G06F3/0653 ,  H04L43/08 ,  H04L47/20 ,  H04L47/2441 ,  G06F11/0709 ,  G06F11/0751 ,  G06F11/079 ,  G06F11/3006 ,  G06F11/3409 ,  G06F7/06 ,  G06T9/005 ,  H03M7/3084 ,  H03M7/42 ,  H04L12/2881 ,  H04L12/4633 ,  G06F13/1652 ,  G06F21/6218 ,  G06F21/76 ,  H03K19/1731 ,  H04L9/0822 ,  H04L41/044 ,  H04L49/104 ,  H04L43/04 ,  H04L43/06 ,  H04L43/0894 ,  G06F9/3851 ,  G06F9/4881 ,  G06F9/505 ,  G06F12/0284 ,  G06F12/0692 ,  G06T1/20 ,  G06T1/60 ,  G06F9/3891 ,  G06F9/5038 ,  G06F9/544 ,  H04L67/1014 ,  G06F8/656 ,  G06F8/658 ,  G06F8/654 ,  G06F9/4401 ,  G06F3/0604 ,  G06F11/3034 ,  G06F11/3055 ,  H01R13/4538 ,  H01R13/631 ,  H05K7/1452 ,  H05K7/1487 ,  H04L47/78

Abstract: A compute device to manage workflow to disaggregated computing resources is provided. The compute device comprises a compute engine receive a workload processing request, the workload processing request defined by at least one request parameter, determine at least one accelerator device capable of processing a workload in accordance with the at least one request parameter, transmit a workload to the at least one accelerator device, receive a work product produced by the at least one accelerator device from the workload, and provide the work product to an application.

公开(公告)号：US20230035468A1

公开(公告)日：2023-02-02

申请号：US17743706

申请日：2022-05-13

Applicant: The Intel Corporation

Inventor： Ned M. Smith ,  Brinda Ganesh ,  Francesc Guim Bernat ,  Eoin Walsh ,  Evan Custodio

IPC: G06F21/60 ,  H04L9/40 ,  H04L41/5003 ,  H04L9/08

Abstract: Technologies for securely providing one or more remote accelerators hosted on edge resources to a client compute device includes a device that further includes an accelerator and one or more processors. The one or more processors are to determine whether to enable acceleration of an encrypted workload, receive, via an edge network, encrypted data from a client compute device, and transfer the encrypted data to the accelerator without exposing content of the encrypted data to the one or more processors. The accelerator is to receive, in response to a determination to enable the acceleration of the encrypted workload, an accelerator key from a secure server via a secured channel, and process, in response to a transfer of the encrypted data from the one or more processors, the encrypted data using the accelerator key.

公开(公告)号：US20220182441A1

公开(公告)日：2022-06-09

申请号：US17552258

申请日：2021-12-15

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Ned Smith ,  Evan Custodio ,  Suraj Prabhkaran ,  Ignacio Astilleros Diez

IPC: H04L67/1008 ,  H04L41/5006 ,  H04L67/51 ,  H04L12/14 ,  H04L47/80 ,  H04L41/5051 ,  H04M15/00 ,  H04L67/61 ,  H04L67/63 ,  H04L67/562

Abstract: Technologies for determining a set of edge resources to offload a workload from a client compute device based on a brokering logic provided by a service provider include a device that includes circuitry that is in communication with edge resources. The circuitry is to receive a brokering logic from a service provider receive a request from a client compute device, wherein the request includes a function to be used to execute the request and one or more parameters associated with the client compute device, determine the one or more parameters, select, as a function of the one or more parameters and the brokering logic, a physical implementation to perform the function, wherein the physical implementation indicates a set of edge resources and a performance level for each edge resource of the set of edge resources, and perform, in response to a selection of the physical implementation, the request using the set of edge resources associated with the physical implementation.

公开(公告)号：US11137922B2

公开(公告)日：2021-10-05

申请号：US15719770

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Evan Custodio ,  Susanne M. Balle ,  Joe Grecco ,  Henry Mitchel ,  Rahul Khanna ,  Slawomir Putyrski ,  Sujoy Sen ,  Paul Dormitzer

IPC: G06F9/50 ,  G06F3/06 ,  G06F16/174 ,  G06F21/57 ,  G06F21/73 ,  G06F8/65 ,  H04L12/24 ,  H04L29/08 ,  G06F11/30 ,  H01R13/453 ,  G06F9/48 ,  H03M7/30 ,  H03M7/40 ,  H04L12/26 ,  H04L12/813 ,  H04L12/851 ,  G06F11/07 ,  G06F11/34 ,  G06F7/06 ,  G06T9/00 ,  H03M7/42 ,  H04L12/28 ,  H04L12/46 ,  H04L29/12 ,  G06F13/16 ,  G06F21/62 ,  G06F21/76 ,  H03K19/173 ,  H04L9/08 ,  H04L12/933 ,  G06F9/38 ,  G06F12/02 ,  G06F12/06 ,  G06T1/20 ,  G06T1/60 ,  G06F9/54 ,  G06F8/656 ,  G06F8/658 ,  G06F8/654 ,  G06F9/4401 ,  H01R13/631 ,  H05K7/14 ,  H04L12/911 ,  G06F11/14 ,  H04L29/06 ,  G06F15/80

Abstract: Technologies for providing accelerated functions as a service in a disaggregated architecture include a compute device that is to receive a request for an accelerated task. The task is associated with a kernel usable by an accelerator sled communicatively coupled to the compute device to execute the task. The compute device is further to determine, in response to the request and with a database indicative of kernels and associated accelerator sleds, an accelerator sled that includes an accelerator device configured with the kernel associated with the request. Additionally, the compute device is to assign the task to the determined accelerator sled for execution. Other embodiments are also described and claimed.

公开(公告)号：US10990309B2

公开(公告)日：2021-04-27

申请号：US15721833

申请日：2017-09-30

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Evan Custodio ,  Susanne M. Balle ,  Joe Grecco ,  Henry Mitchel ,  Slawomir Putyrski

IPC: G06F9/46 ,  G06F3/06 ,  G06F16/174 ,  G06F21/57 ,  G06F21/73 ,  G06F8/65 ,  H04L12/24 ,  H04L29/08 ,  G06F11/30 ,  G06F9/50 ,  H01R13/453 ,  G06F9/48 ,  H03M7/30 ,  H03M7/40 ,  H04L12/26 ,  H04L12/813 ,  H04L12/851 ,  G06F11/07 ,  G06F11/34 ,  G06F7/06 ,  G06T9/00 ,  H03M7/42 ,  H04L12/28 ,  H04L12/46 ,  H04L29/12 ,  G06F13/16 ,  G06F21/62 ,  G06F21/76 ,  H03K19/173 ,  H04L9/08 ,  H04L12/933 ,  G06F9/38 ,  G06F12/02 ,  G06F12/06 ,  G06T1/20 ,  G06T1/60 ,  G06F9/54 ,  G06F8/656 ,  G06F8/658 ,  G06F8/654 ,  G06F9/4401 ,  H01R13/631 ,  H05K7/14 ,  H04L12/911 ,  G06F11/14 ,  H04L29/06 ,  G06F15/80

Abstract: A compute device to manage workflow to disaggregated computing resources is provided. The compute device comprises a compute engine receive a workload processing request, the workload processing request defined by at least one request parameter, determine at least one accelerator device capable of processing a workload in accordance with the at least one request parameter, transmit a workload to the at least one accelerator device, receive a work product produced by the at least one accelerator device from the workload, and provide the work product to an application.

公开(公告)号：US20190227843A1

公开(公告)日：2019-07-25

申请号：US16369036

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Evan Custodio ,  Francesc Guim Bernat ,  Suraj Prabhakaran ,  Trevor Cooper ,  Ned M. Smith ,  Kshitij Doshi ,  Petar Torre

IPC: G06F9/50

Abstract: Technologies for migrating data between edge accelerators hosted on different edge locations include a device hosted on a present edge location. The device includes one or more processors to: receive a workload from a requesting device, determine one or more accelerator devices hosted on the present edge location to perform the workload, and transmit the workload to the one or more accelerator devices to process the workload. The one or more processor is further to determine whether to perform data migration from the one or more accelerator devices to one or more different edge accelerator devices hosted on a different edge location, and send, in response to a determination to perform the data migration, a request to the one or more accelerator devices on the present edge location for transformed workload data to be processed by the one or more different edge accelerator devices.

公开(公告)号：US20190065260A1

公开(公告)日：2019-02-28

申请号：US15858316

申请日：2017-12-29

Applicant: Intel Corporation

Inventor： Susanne M. Balle ,  Evan Custodio ,  Francesc Guim Bernat ,  Slawomir Putyrski

IPC: G06F9/50 ,  G06F11/34 ,  G06F11/30

Abstract: Technologies for scaling provisioning of kernel instances in a system as a function of a topology of accelerated kernels include a compute device having a compute engine. The compute engine receives, from a sled, a kernel configuration request to provision a kernel on an accelerator device. The sled is to execute a workload. The kernel accelerates a task in the workload. The compute engine determines, as a function of one or more requirements of the workload, a topology of kernels to service the request. The topology maps data communication between kernels. The compute engine configures the kernel on the accelerator device according to the determined topology. Other embodiments are also described and claimed

公开(公告)号：US11579788B2

公开(公告)日：2023-02-14

申请号：US16943221

申请日：2020-07-30

Applicant: Intel Corporation

Inventor： Henry Mitchel ,  Joe Grecco ,  Sujoy Sen ,  Francesc Guim Bernat ,  Susanne M. Balle ,  Evan Custodio ,  Paul Dormitzer

IPC: G06F3/06 ,  G06F16/174 ,  G06F21/57 ,  G06F21/73 ,  G06F8/65 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/12 ,  H04L67/10 ,  G06F11/30 ,  G06F9/50 ,  H01R13/453 ,  G06F9/48 ,  G06F9/455 ,  H05K7/14 ,  H04L61/5007 ,  H04L67/63 ,  H04L67/75 ,  H03M7/30 ,  H03M7/40 ,  H04L43/08 ,  H04L47/20 ,  H04L47/2441 ,  G06F11/07 ,  G06F11/34 ,  G06F7/06 ,  G06T9/00 ,  H03M7/42 ,  H04L12/28 ,  H04L12/46 ,  G06F13/16 ,  G06F21/62 ,  G06F21/76 ,  H03K19/173 ,  H04L9/08 ,  H04L41/044 ,  H04L49/104 ,  H04L43/04 ,  H04L43/06 ,  H04L43/0894 ,  G06F9/38 ,  G06F12/02 ,  G06F12/06 ,  G06T1/20 ,  G06T1/60 ,  G06F9/54 ,  H04L67/1014 ,  G06F8/656 ,  G06F8/658 ,  G06F8/654 ,  G06F9/4401 ,  H01R13/631 ,  H04L47/78 ,  G06F16/28 ,  H04Q11/00 ,  G06F11/14 ,  H04L41/046 ,  H04L41/0896 ,  H04L41/142 ,  H04L9/40 ,  G06F15/80

Abstract: Technologies for providing shared memory for accelerator sleds includes an accelerator sled to receive, with a memory controller, a memory access request from an accelerator device to access a region of memory. The request is to identify the region of memory with a logical address. Additionally, the accelerator sled is to determine from a map of logical addresses and associated physical address, the physical address associated with the region of memory. In addition, the accelerator sled is to route the memory access request to a memory device associated with the determined physical address.

公开(公告)号：US11474700B2

公开(公告)日：2022-10-18

申请号：US16398948

申请日：2019-04-30

Applicant: Intel Corporation

Inventor： Susanne M. Balle ,  Evan Custodio ,  Francesc Guim Bernat

IPC: G06F13/38 ,  G06F3/06

Abstract: Technologies for compressing communications for accelerator devices are disclosed. An accelerator device may include a communication abstraction logic units to manage communication with one or more remote accelerator devices. The communication abstraction logic unit may receive communication to and from a kernel on the accelerator device. The communication abstraction logic unit may compress and decompress the communication without instruction from the corresponding kernel. The communication abstraction logic unit may choose when and how to compress communications based on telemetry of the accelerator device and the remote accelerator device.

公开(公告)号：US20220166847A1

公开(公告)日：2022-05-26

申请号：US17542175

申请日：2021-12-03

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Thomas Willhalm ,  Petar Torre ,  Ned Smith ,  Brinda Ganesh ,  Evan Custodio ,  Suraj Prabhakaran

IPC: H04L67/60 ,  H04L12/66 ,  H04L47/70 ,  H04L67/2885 ,  H04L67/5681

Abstract: Technologies for fulfilling service requests in an edge architecture include an edge gateway device to receive a request from an edge device or an intermediate tier device of an edge network to perform a function of a service by an entity hosting the service. The edge gateway device is to identify one or more input data to fulfill the request by the service and request the one or more input data from an edge resource identified to provide the input data. The edge gateway device is to provide the input data to the entity associated with the request.