PROGRAMMABLE CLOCK FREQUENCY DOUBLER DEVICE AND METHOD
    11.
    发明申请
    PROGRAMMABLE CLOCK FREQUENCY DOUBLER DEVICE AND METHOD 审中-公开
    可编程时钟双频器件及方法

    公开(公告)号:WO2013154418A3

    公开(公告)日:2013-12-05

    申请号:PCT/MY2013000076

    申请日:2013-04-08

    Applicant: MIMOS BERHAD

    CPC classification number: G06F1/06 G06F1/08 H03K5/00006

    Abstract: The present invention discloses a device and method for use in a clocking requirement, wherein the device in accordance with the preferred embodiments of the present invention aids to synchronize in the event that there are two different clock sources. The device comprises; a means for receiving frequency input clock and derive output clock frequency; a means to convert serial to parallel data and configure first frequency doubler and output selector; a means for generating a primary clock as a reference signal; a means for receiving input signals frequency doublers and driving larger output load; and a means for selecting a plurality of doubled signals from a clock driver output.

    Abstract translation: 本发明公开了一种用于时钟要求的装置和方法,其中根据本发明的优选实施例的装置有助于在存在两个不同时钟源的情况下同步。 该装置包括: 用于接收频率输入时钟并导出输出时钟频率的装置; 将串行转换为并行数据并配置第一倍频器和输出选择器的方法; 用于产生主时钟作为参考信号的装置; 用于接收输入信号频率倍增器和驱动较大输出负载的装置; 以及用于从时钟驱动器输出中选择多个双倍信号的装置。

    A READ-OUT INTERFACE CIRCUIT (ROIC)
    12.
    发明申请
    A READ-OUT INTERFACE CIRCUIT (ROIC) 审中-公开
    读出接口电路(ROIC)

    公开(公告)号:WO2011053111A3

    公开(公告)日:2011-10-06

    申请号:PCT/MY2010000217

    申请日:2010-10-21

    CPC classification number: G01N27/228 G01N27/223

    Abstract: A read-out interface circuitry (ROIC) (10) connectable to a sensor (29) is provided, the ROIC (10) includes at least one phase detector circuit (20) to compare phase difference between an input reference signal and an output signal from the sensor (29), and at least one charge pump circuit (40) connectable to the at least one phase detector circuit (20) wherein an output of the at least one charge pump circuit (40) is convertible to a direct current (DC) voltage.

    Abstract translation: 提供可连接到传感器(29)的读出接口电路(ROIC)(10),ROIC(10)包括至少一个相位检测器电路(20),用于比较输入参考信号和输出信号之间的相位差 以及至少一个可连接到所述至少一个相位检测器电路(20)的电荷泵电路(40),其中所述至少一个电荷泵电路(40)的输出可转换成直流电( DC)电压。

    A SUCCESSIVE APPROXIMATIONREGISTRER (SAR)ANALOG-TO-DIGITAL CONVERTER (ADC) WITH PROGRAMMABLE VOLTAGE REFERENCE
    13.
    发明申请
    A SUCCESSIVE APPROXIMATIONREGISTRER (SAR)ANALOG-TO-DIGITAL CONVERTER (ADC) WITH PROGRAMMABLE VOLTAGE REFERENCE 审中-公开
    具有可编程电压参考的成功的近似转换器(SAR)模数转换器(ADC)

    公开(公告)号:WO2009070001A3

    公开(公告)日:2009-10-15

    申请号:PCT/MY2009000012

    申请日:2009-01-13

    CPC classification number: H03M1/0604 H03M1/46 H03M1/765

    Abstract: For a SAR ADC with having an integrated programmable voltage reference function, a process for the voltage programmable positive voltage reference integrated to SAR ADC, includes; a) integrating a bandgap (21) to provides a stable voltage b) scaling up to a higher voltage by first Opamp (22) from the bandgap (21) and the voltage divided by the first resistor string (24) and second resistor string (25) to provides taps for the different voltage levels c) buffering the voltage at second Opamp (23) d) transferring the voltage to the decoding network (28) e) decoding the voltage by the decoder having at least one signal (29) and connecting the voltage to at least one resistor string (27) and at least one resistor string (27) tap point to the input third Opamp (30) f) buffering the voltage at the third Opamp (30) and the output becoming voltage reference programmable g) used as voltage reference at the digital-to-analog DAC (12) and the output of the converted voltage becoming voltage digital-to-analog (Vdac) h) sending the Vdac to the comparator (13) and the output of the comparator sending to the SAR (11) i) modifying the Vdac contents bit by bit until the data are the digital equivalent of the analog input j) repeating steps (a) through (i) until a predetermined number of trials have been completed.

    Abstract translation: 对于具有集成可编程电压参考功能的SAR ADC,集成到SAR ADC的电压可编程正电压参考的过程包括: a)集成带隙(21)以提供稳定的电压b)通过第一Opamp(22)从带隙(21)和由第一电阻器串(24)和第二电阻器串(...)分压的电压来扩展到更高的电压 提供用于不同电压电平的抽头c)缓冲第二运算放大器(23)处的电压d)将电压传送到解码网络(28)e)解码器具有至少一个信号(29)和 将电压连接到至少一个电阻器串(27)和至少一个电阻器串(27)分接点到输入的第三运算放大器(30)f)缓冲第三运算放大器(30)处的电压,并且输出变为电压基准可编程 g)用作数模转换器DAC(12)上的参考电压,并将转换后的电压的输出变为电压数模(Vdac),h)将Vdac发送到比较器(13),并输出 比较器发送到SAR(11)i)逐位修改Vdac内容,直到数据为止 模拟输入的数字等价物j)重复步骤(a)至(i),直到预定数量的试验完成。

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