公开(公告)号：FR2768576A1

公开(公告)日：1999-03-19

申请号：FR9810128

申请日：1998-08-06

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J ,  BECKER CHRISTOHER J ,  EBERHARDT MICHAEL A ,  FRANK COLIN D ,  RASKY PHILLIP D

IPC: H04B1/7113 ,  H04B1/7115 ,  H04B1/7117 ,  H04B1/69 ,  H04B7/216

Abstract: A RAKE receiver (112) includes a plurality of fingers (122, 124, 126, 128). Each finger includes a demodulator (402) for demodulating a ray of a multipath signal and a time tracking circuit (404) for controlling the time position of the finger in accordance with time position of the ray. A low delay-spread condition is detected and the positions of two adjacent fingers are controlled to prevent convergence of two or more fingers about a common time position. By maintaining finger timing separation, path diversity is exploited by the RAKE receiver even during the low delay-spread condition to improve receiver performance.

公开(公告)号：BR9704950A

公开(公告)日：1998-12-01

申请号：BR9704950

申请日：1997-10-01

Applicant: MOTOROLA INC

Inventor： SCHIRTZINGER TRACIE A ,  LAROSA CHRISTOPHER P

IPC: H03H21/00 ,  H03H17/02 ,  H03H17/06 ,  H04Q7/32

Abstract: A digital filter (200) suitable for use in a CDMA or other burst-mode communication device (100) employs precombining of filter coefficients to reduce filter complexity and power dissipation. The digital filter (200) includes a coefficient storage circuit (216) for storing the precombined coefficients, a selection circuit (212) for selecting appropriate precombined coefficients in response to the input signal and a combining circuit (214) for combining the appropriate precombined coefficients to produce a filtered signal.

公开(公告)号：CA2120714C

公开(公告)日：1998-11-24

申请号：CA2120714

申请日：1993-09-16

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL JOHN

IPC: H04B7/26 ,  H04B1/10 ,  H04B3/46 ,  H04B17/00 ,  H04L27/18 ,  H04B1/40 ,  H04Q7/32 ,  H04Q7/34

Abstract: The present disclosure includes a discussion of a method of and apparatus for channel quality estimation (CQE) in a receiver. Each channel is divided into observation intervals and sub-intervals. The duration of the sub-interval is chosen as the largest interval in which the channel is essentially static. The CQE generates error information for each symbol of the sub-interval and collects the error information for a symbol interval forming a sub-interval error value. The CQE maps the sub-interval error value into a sub-interval bit error rate (BER) estimate The mapping is a non-linear function dependent on the specific radio system. Then, the CQE averages the sub-interval BER estimates over the entire observation interval, forming an interval BER estimate Finally, the CQE compares the interval BER estimate to a predetermined threshold, forming a channel quality estimation decision for each observation interval.

公开(公告)号：ITRM980585D0

公开(公告)日：1998-09-11

申请号：ITRM980585

申请日：1998-09-11

Applicant: MOTOROLA INC

Inventor： RASKY PHILLIP D ,  LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J ,  BECKER CRISTOPHER ,  EBERHARDT MICHAEL A ,  FRANK COLIN

IPC: H04B1/7113 ,  H04B1/7115 ,  H04B1/7117

Abstract: A RAKE receiver (112) includes a plurality of fingers (122, 124, 126, 128). Each finger includes a demodulator (402) for demodulating a ray of a multipath signal and a time tracking circuit (404) for controlling the time position of the finger in accordance with time position of the ray. A low delay-spread condition is detected and the positions of two adjacent fingers are controlled to prevent convergence of two or more fingers about a common time position. By maintaining finger timing separation, path diversity is exploited by the RAKE receiver even during the low delay-spread condition to improve receiver performance.

公开(公告)号：CA2101527C

公开(公告)日：1998-08-11

申请号：CA2101527

申请日：1992-09-21

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H04L27/233 ,  A61F13/15 ,  H03D7/00 ,  H03D13/00 ,  H04L27/22 ,  H04Q7/32

Abstract: The present invention discusses a frequency translation apparatus for altering the effective frequency of the phase information of an input signal (115). The input signal (115) has a first phase (~(t)) and a first frequency (fi). The phase of the input signal is extracted and digitized at a second frequency (fO), forming a second N-bit digital phase signal (~'(t))(311). The frequency translation apparatus generates a third digital phase signal (319) which approximates the difference between ~(t) and ~'(t). Then, the frequency translation apparatus (313) combines the second digital phase signal and the third digital phase signal, forming a fourth digital phase signal (307) substantially approximating the first phase signal.

公开(公告)号：CZ283937B6

公开(公告)日：1998-07-15

申请号：CZ256493

申请日：1993-01-21

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H04B7/26 ,  H04J3/06 ,  H04L7/00 ,  H04L7/033 ,  H04L27/22 ,  H04L7/02

公开(公告)号：GB2318005A

公开(公告)日：1998-04-08

申请号：GB9720004

申请日：1997-09-22

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  SCHIRTZINGER TRACIE A

IPC: H03H21/00 ,  H03H17/02 ,  H03H17/06

Abstract: A digital filter suitable for use in a CDMA or other burst-mode communication device employs precombining of filter coefficients to reduce filter complexity and power dissipation. The digital filter includes a coefficient storage circuit 216 for storing the precombined coefficients, a selection circuit 212 for selecting appropriate precombined coefficients in response to the input signal and a combining circuit 214 for combining the appropriate precombined coefficients to produce a filtered signal.

公开(公告)号：GB2273214B

公开(公告)日：1995-10-25

申请号：GB9322405

申请日：1993-01-25

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H04Q7/38 ,  H04J3/00 ,  H04L7/02 ,  H04L7/033 ,  H04L7/04 ,  H04L7/08 ,  H04L7/10 ,  H04L27/22 ,  H04L7/00

Abstract: The present disclosure includes a discussion of a decision-directed clock recovery system which includes circuitry to prevent false-locking and accelerate acquisition on a known symbol patterns. The clock recovery system has at least two control circuits. Each control circuit has an effective bandwidth and also generates a clock signal. The clock recovery system samples the received data signal using the two clock signals, forming a corresponding first and second sampled signal. The sampled signals are used to generate corresponding symbol decisions. The symbol decision signals are processed to detect a known symbol pattern in the received data signal. Upon detection of the known bit sequence, the characteristics of the clock recovery system are modified, namely, the effective bandwidth of the control circuits are modified.

公开(公告)号：AU656487B2

公开(公告)日：1995-02-02

申请号：AU4927393

申请日：1993-09-16

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H04B7/26 ,  H04B1/10 ,  H04B3/46 ,  H04B17/00 ,  H04L27/18

公开(公告)号：GB2277426A

公开(公告)日：1994-10-26

申请号：GB9406355

申请日：1994-03-30

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: G01R29/02 ,  H03L7/085 ,  H04B14/02 ,  H04L27/233 ,  H04L27/22

Abstract: A radio receiver directly digitizes the phase of an intermediate frequency (IF) signal with a desired resolution. The frequency of the reference oscillator (501) in the direct phase digitizer (403) is reduced when compared to the frequency previously required for the same resolution. The reduction in the reference oscillator frequency is accomplished by differentiating between IF zero-crossings that occur during the first half of a reference oscillator cycle and zero-crossings which occur during the second half of the reference oscillator cycle. The apparatus utilizes 2 zero-crossing detectors (503, 505), the first zero-crossing detector (503) is driven by a positive edge of the reference oscillator signal and the second zero-crossing detector (505) is driven by a negative edge of the reference oscillator signal. Depending upon the alignment of the negative edge zero-crossing indicator and the positive edge zero-crossing indicator, the N-bit phase signal is modified or shifted by one-half a phase sector.