CURRENT MIRROR CIRCUIT ARRANGEMENT
    12.
    发明专利

    公开(公告)号:DE3378344D1

    公开(公告)日:1988-12-01

    申请号:DE3378344

    申请日:1983-05-13

    Applicant: MOTOROLA INC

    Abstract: A current mirror circuit arrangement wherein an output current is provided by an output transistor and coupled between the base electrode of the output transistor and a reference potential is a series combination of a resistor and a diode. Signals are fed to the base electrode of the output transistor from a voltage supply via an emitter follower circuit and a resistor is connected across the diode so as to share current with the diode to increase its impedance at low current values and consequently to improve the overall linearity of the output current input voltage characteristic.

    13.
    发明专利
    未知

    公开(公告)号:IT8247773D0

    公开(公告)日:1982-02-11

    申请号:IT4777382

    申请日:1982-02-11

    Applicant: MOTOROLA INC

    Abstract: A phase detector circuit has low offsets and is easily made as a bipolar integrated circuit. A first input to the phase detector controls a transistor which in turn controls a current source. The output of the current source is connected to a current mirror which has an NPN transistor. The current mirror is connected to ground by a transistor which is controlled by a second input signal. When the first input signal is present and is out of phase with the second input signal the output of the phase detector flows from the current source through the collector base junction of the NPN transistor. When both input signals are in phase the output of the phase detector serves as a current sink whose current carrying capabilities is controlled by the output of the current source.

    Phase locked loop oscillator circuit

    公开(公告)号:GB2335555A

    公开(公告)日:1999-09-22

    申请号:GB9805847

    申请日:1998-03-20

    Applicant: MOTOROLA INC

    Abstract: A phase locked loop includes a ring oscillator as a voltage controlled oscillator. This oscillator has a frequency control input 50, a common frequency output 60 and a number of stages 10, 20 and 30 operating in sequence and having a fundamental frequency of operation. Each of the stages includes a pull-down transistor 12, 22 or 32 connected as a cascode and supplying charging current to pull-down transistors 14, 24 or 34 arranged as a capacitor. The cascodes conduct in sequence and by adding their currents together at a summing resistor 40, a current is derived at 60 which fluctuates at three times the fundamental frequency. A prescaler (fig.2 not shown) also forming part of the phase locked loop including the ring oscillator is supplied with the fundamental frequency derived at terminal 38 instead of the higher frequency at output 60 and the power consumption of the loop is reduced. The phase locked loop may form part of a frequency synthesiser used in mobile telephones.

    Synchronous demodulator
    15.
    发明专利

    公开(公告)号:GB2330024A

    公开(公告)日:1999-04-07

    申请号:GB9721055

    申请日:1997-10-03

    Applicant: MOTOROLA INC

    Abstract: A synchronous demodulator 10 drives an output antenna 21 with a push pull driver circuit 13. The output antenna is driven with a first signal of a first frequency and receives a second signal modulated by a second frequency which is lower than the first frequency. The output driver circuit is used to demodulate the first signal from the second signal. A coupling transformer 26 may be used in a synchronous demodulator to determine variations in a load current of the output driver stage. The modulation of the first signal to produce the second may occur in a smart card.

    16.
    发明专利
    未知

    公开(公告)号:DE3582612D1

    公开(公告)日:1991-05-29

    申请号:DE3582612

    申请日:1985-06-03

    Applicant: MOTOROLA INC

    Abstract: A timebase circuit is described, for compensation of picture dimensions of television type display, for EHT fluctuations in which a control current (ic) is derived by multiplying (17) a current (IEHT) dependent upon the picture beam current with a reference current (IDAC) derived from a digital to analogue converter (19) fed with a digital code.

    18.
    发明专利
    未知

    公开(公告)号:DE3578543D1

    公开(公告)日:1990-08-09

    申请号:DE3578543

    申请日:1985-06-03

    Applicant: MOTOROLA INC

    Abstract: @ A timebase circuit for use in the vertical timebase of a television receiver in which a linearity control current fed to the ramp capacitor is derived by multiplying a current proportional to the difference between the instantaneous and average ramp voltages by a reference current which may be adjusted to control linearity.

    TIMEBASE CIRCUIT
    19.
    发明专利

    公开(公告)号:HK45490A

    公开(公告)日:1990-06-22

    申请号:HK45490

    申请日:1990-06-14

    Applicant: MOTOROLA INC

    Abstract: A timbase circuit is desribed for providing a horizontal drive correction waveform to correct for pincushion distortion in which a parabolic correction current is derived by squaring (4) a current proportional to the difference between the instantaneous and average values of the vertical ramp voltage. The correction current may be tilted by combination with a linear current proportional to the ramp voltage (7) and may also be amplitude controlled (16).

    TIMEBASE CIRCUIT
    20.
    发明专利

    公开(公告)号:HK52390A

    公开(公告)日:1990-07-20

    申请号:HK52390

    申请日:1990-07-12

    Applicant: MOTOROLA INC

    Abstract: A timebase circuit is described, for compensation of picture dimensions of television type display, for EHT fluctuations in which a control current (ic) is derived by multiplying (17) a current (IEHT) dependent upon the picture beam current with a reference current (IDAC) derived from a digital to analogue converter (19) fed with a digital code.

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