Abstract:
A receiver unit includes a first buffer that receives and stores digitized samples at a particular sample rate and a data processor that retrieves segments of digitized samples from the first buffer and processes the retrieved segments with a particular set of parameters values. The data processor is operated based on a processing clock having a frequency that is (e.g., then or more times) higher than the sample rate. Multiple instances of the received signal can be processed by retrieving and processing multiple segments of digitized samples from the first buffer. the receiver unit typically further includes a receiver that receives and processes a transmitted signal to provide the digitized samples and a controller that dispatches tasks for the data processor. The data processor can be designed to include a correlator, a symbol demodulation and combiner, a first accumulator, and a second buffer, or a combination thereof. The correlator despreads the retrieved segments of digitized samples with corresponding segments of PN despreading sequences to provide correlated samples, which are further processed by the symbol demodulation and combiner to provide processed symbols. The second buffer stores the processed symbols, and can be designed to provide de-interleaving of the processed symbols.
Abstract:
Coherent detection of high-speed digital wireless communications becomes more difficult when the frequencies of the transmitter and receiver oscillators do not coincide. A frequency-locked loop may be used to characterize this frequency offset by processing the samples received on a pilot channel. Rather than using the offset information thus derived to correct the frequency of the received signal, the invention realizes a considerable computational savings by applying a frequency correction to the despread pilot samples instead.
Abstract:
THE FINITE IMPULSE RESPONSE (FIR) FILTER IS IMPLEMENTED AS A TABLE USING READ-ONLY MEMORY (ROM). THE FIR FILTER TABLE STORES A PRE-CALCULATED OUTPUT FILTER VALUE FOR EACH PERMISSIBLE COMBINATION OF INPUT VALUES TO BE FILTERED. STREAMS OF INPUT VALUES ARE SUCCESSIVELY SHIFTED INTO THE TABLE AND CORRESPONDING OUTPUT VALUES ARE SUCCESSIVELY OUTPUT. IN AN EXEMPLARY IMPLEMENTATION, THE FIR FILTER IS EMPLOYED WITHIN A DIGITAL CELLULAR TELEPHONE FOR USE IN SMOOTHING A DIGITAL SIGNAL TO BE TRANSMITTED. THE SIZE OF THE REQUIRED FIR FILTER TABLE IS MINIMIZED BY EXPLOITING CONSTRAINTS IMPOSED UPON THE SIGNAL TO BE FILTERED AND BY EXPLOITING LINEARITY AND SYMMETRY WITHIN THE FILTER ITSELF. MORE SPECIFICALLY, THE TELEPHONE EMPLOYS A DATA BURST RANDOMIZER TO PROVIDE A DATA SIGNAL COMPOSED OF SEQUENCES OF NULL OR 0 VALUES AND SEQUENCES OF ANTIPODAL VALUES (+1''S AND -1''S). HENCE, THE PERMISSIBLE INPUT COMBINATIONS FOR THE FIR FILTER INCLUDE ONLY PATTERNS CONTAINING EITHER ALL ANTIPODAL SIGNALS, ALL NULL SIGNALS, LEADING ANTIPODAL SIGNALS FOLLOWED BY TRAILING NULL SIGNALS, OR LEADING NULL SIGNALS FOLLOWED BY TRAILING ANTIPODAL SIGNALS. THE FIR FILTER LOOK UP IS CONFIGURED TO EXPLOIT THESE LIMITATIONS ON THE INPUT STREAMS YIELDING A LOOK UP TABLE HAVING RELATIVELY FEW ENTRIES. METHOD AND APPARATUS IMPLEMENTATIONS ARE DISCLOSED.FIGURE 5
Abstract:
An integrated search processor used in a modem for a spread spectrum communications system buffers receive samples and utilizes a time sliced transform processor operating on successive offsets from the buffer. The search processor autonomously steps through a search as configured by a microprocessor specified search parameter set, which can include the group of antennas to search over, the starting offset and width of the search window to search over, and the number of Walsh symbols to accumulate results at each offset. The search processor calculates the correlation energy at each offset, and presents a summary report of the best paths found in the search to use for demodulation element reassignment. This reduces the searching process related workload of the microprocessor and also reduces the modem costs by allowing a complete channel element modem circuit to be produced in a single IC.
Abstract:
An integrated search processor used in a modem for a spread spectrum communications system buffers receive samples and utilizes a time sliced transform processor operating on successive offsets from the buffer. The search processor autonomously steps through a search as configured by a microprocessor specified search parameter set, which can include the group of antennas to search over, the starting offset and width of the search window to search over, and the number of Walsh symbols to accumulate results at each offset. The search processor calculates the correlation energy at each offset, and presents a summary report of the best paths found in the search to use for demodulation element reassignment. This reduces the searching process related workload of the microprocessor and also reduces the modem costs by allowing a complete channel element modem circuit to be produced in a single IC.
Abstract:
An integrated search processor used in a modem for a spread spectrum communications system buffers receive samples and utilizes a time sliced transform processor operating on successive offsets from the buffer. The search processor autonomously steps through a search as configured by a microprocessor specified search parameter set, which can include the group of antennas to search over, the starting offset and width of the search window to search over, and the number of Walsh symbols to accumulate results at each offset. The search processor calculates the correlation energy at each offset, and presents a summary report of the best paths found in the search to use for demodulation element reassignment. This reduces the searching process related workload of the microprocessor and also reduces the modem costs by allowing a complete channel element modem circuit to be produced in a single IC.
Abstract:
An integrated search processor used in a modem for a spread spectrum communications system buffers receive samples and utilizes a time sliced transform processor operating on successive offsets from the buffer. The search processor autonomously steps through a search as configured by a microprocessor specified search parameter set, which can include the group of antennas to search over, the starting offset and width of the search window to search over, and the number of Walsh symbols to accumulate results at each offset. The search processor calculates the correlation energy at each offset, and presents a summary report of the best paths found in the search to use for demodulation element reassignment. This reduces the searching process related workload of the microprocessor and also reduces the modem costs by allowing a complete channel element modem circuit to be produced in a single IC.
Abstract:
A receiver unit includes a first buffer that receives and stores digitized samples at a particular sample rate and a data processor that retrieves segments of digitized samples from the first buffer and processes the retrieved segments with a particular set of parameters values. The data processor is operated based on a processing clock having a frequency that is (e.g., then or more times) higher than the sample rate. Multiple instances of the received signal can be processed by retrieving and processing multiple segments of digitized samples from the first buffer. the receiver unit typically further includes a receiver that receives and processes a transmitted signal to provide the digitized samples and a controller that dispatches tasks for the data processor. The data processor can be designed to include a correlator, a symbol demodulation and combiner, a first accumulator, and a second buffer, or a combination thereof. The correlator despreads the retrieved segments of digitized samples with corresponding segments of PN despreading sequences to provide correlated samples, which are further processed by the symbol demodulation and combiner to provide processed symbols. The second buffer stores the processed symbols, and can be designed to provide de-interleaving of the processed symbols.
Abstract:
Coherent detection of high-speed digital wireless communications becomes more difficult when the frequencies of the transmitter and receiver oscillators do not coincide. A frequency-locked loop may be used to characterize this frequency offset by processing the samples received on a pilot channel. Rather than using the offset information thus derived to correct the frequency of the received signal, the invention realizes a considerable computational savings by applying a frequency correction to the despread pilot samples instead.