WIDEBAND MULTI-MODE VCO
    11.
    发明申请
    WIDEBAND MULTI-MODE VCO 审中-公开
    宽带多模VCO

    公开(公告)号:WO2012092385A1

    公开(公告)日:2012-07-05

    申请号:PCT/US2011/067620

    申请日:2011-12-28

    Abstract: A VCO includes a transformer-based resonator that has a first LC tank and a second LC tank. The resonator has an even resonant mode and an odd resonant mode. The VCO further includes an active transconductance network that is coupled to a two-terminal port of the first tank and is also coupled to a two-terminal port of the second tank. A first terminal of the port of the first tank is capacitively coupled to a first terminal of the port of the second tank. A second terminal of the port of the first tank is capacitively coupled to a second terminal of the port of the second tank. The active transconductance network causes the resonator to resonate in a selectable one of the even and odd resonant modes depending on a digital control signal. The VCO is fine tuned by changing the capacitances of capacitors of the tanks.

    Abstract translation: VCO包括具有第一LC箱和第二LC箱的基于变压器的谐振器。 谐振器具有均匀谐振模式和奇数谐振模式。 VCO还包括有源跨导网络,其耦合到第一箱的两端口并且还耦合到第二箱的两端口。 第一罐的端口的第一端子电容耦合到第二罐的端口的第一端子。 第一罐的端口的第二端子电容耦合到第二罐的端口的第二端子。 有源跨导网络使得谐振器根据数字控制信号以奇数谐振模式和奇数谐振模式中的可选择谐振模式谐振。 通过改变电容器的电容,可以对VCO进行微调。

    DUAL-FEED DUAL-BAND INTERLEAVED ANTENNA CONFIGURATION

    公开(公告)号:WO2022066375A1

    公开(公告)日:2022-03-31

    申请号:PCT/US2021/048440

    申请日:2021-08-31

    Abstract: Techniques are provided for improving the bandwidth of a dual-band antenna in a mobile device. An example wireless device includes at least one radio frequency integrated circuit, and at least one patch antenna array operably coupled to the least one radio frequency integrated circuit, comprising a first rectangular patch including a first side and a second side, wherein a length of the first side is greater than a length of the second side, and a second rectangular patch including a first side and a second side of the same dimensions as the respective first side and the second side of the first rectangular patch, wherein the first side of the second rectangular patch is disposed adjacent and parallel to the second side of the first rectangular patch.

    WIRELESS COMMUNICATION DEVICE
    13.
    发明申请

    公开(公告)号:WO2020068451A1

    公开(公告)日:2020-04-02

    申请号:PCT/US2019/050962

    申请日:2019-09-13

    Abstract: A wireless communication device includes: a housing configured to retain components of the wireless communication device; an antenna unit configured to receive first free-space millimeter-wave signals and convert these signals to first electronic millimeter-wave signals; a processor disposed in the housing; and front-end circuitry communicatively coupled to the antenna unit, the front-end circuitry coupled to the processor by at least one transmission line; where the front-end circuitry is configured to: receive the first electronic millimeter-wave signals from the antenna unit; convert the first electronic millimeter-wave signals to first reduced-frequency signals each having a lower frequency than the first electronic millimeter-wave signals; and convey the first reduced-frequency signals over a same transmission line of the at least one transmission line in a multiplexed manner with different ones of the first reduced-frequency signals having different conveyance characteristics such that the different ones of the first reduced-frequency signals can be separately processed.

    FREQUENCY DIVIDER WITH DUTY CYCLE ADJUSTMENT WITHIN FEEDBACK LOOP
    14.
    发明申请
    FREQUENCY DIVIDER WITH DUTY CYCLE ADJUSTMENT WITHIN FEEDBACK LOOP 审中-公开
    频率分频器在反馈环路中进行占空比调整

    公开(公告)号:WO2014209715A1

    公开(公告)日:2014-12-31

    申请号:PCT/US2014/042920

    申请日:2014-06-18

    CPC classification number: H03L7/18 H03K3/017 H03K5/1565 H03K21/08

    Abstract: A frequency divider (300) with duty cycle adjustment within a feedback loop is disclosed. In an exemplary design, an apparatus includes at least one divider circuit (310a, 310b) and at least one duty cycle adjustment circuit (320a, 320b) coupled in a feedback loop. The divider circuit(s) receive a clock signal (input Clock) at a first frequency and provide at least one divided signal (Idivp, Idivn) at a second frequency, which is a fraction of the first frequency. The duty cycle adjustment circuit(s) adjust the duty cycle of the at least one divided signal and provide at least one duty cycle adjusted signal (ladjp, ladjn) to the divider circuit(s). The divider circuit(s) may include first and second latches (310a, 310b), and the duty cycle adjustment circuit(s) may include first and second duty cycle adjustment circuits (320a, 320b). The first and second latches and the first and second duty cycle adjustment circuits may be coupled in a feedback loop and may perform divide-by-2.

    Abstract translation: 公开了一种在反馈环路内进行占空比调整的分频器(300)。 在示例性设计中,装置包括耦合在反馈回路中的至少一个除法器电路(310a,310b)和至少一个占空比调整电路(320a,320b)。 分频器电路以第一频率接收时钟信号(输入时钟),并以第二频率提供至少一个分频信号(Idivp,Idivn),其为第一频率的一部分。 占空比调整电路调整至少一个分频信号的占空比,并向分频器电路提供至少一个占空比调整信号(ladjp,ladjn)。 分频器电路可以包括第一和第二锁存器(310a,310b),并且占空比调整电路可以包括第一和第二占空比调整电路(320a,320b)。 第一和第二锁存器以及第一和第二占空比调节电路可以耦合在反馈回路中并且可以执行除以2。

    DIVERSITY RECEIVER WITH SHARED LOCAL OSCILLATOR SIGNAL IN DIVERSITY MODE
    15.
    发明申请
    DIVERSITY RECEIVER WITH SHARED LOCAL OSCILLATOR SIGNAL IN DIVERSITY MODE 审中-公开
    多样性接收器,具有多种局部振荡信号

    公开(公告)号:WO2014100661A1

    公开(公告)日:2014-06-26

    申请号:PCT/US2013/077080

    申请日:2013-12-20

    Abstract: A multi-mode receiver is disclosed that is reconfigurable to share a local oscillator signal in diversity mode to save power consumption. In an exemplary embodiment, an apparatus includes a primary receiver having a primary mixer configured to down-convert a primary signal and a secondary mixer configured to down-convert a secondary signal in carrier aggregation mode. The apparatus also includes a supplemental mixer that uses a shared primary local oscillator (LO) signal generated by a shared primary frequency synthesizer in diversity mode to reduce power consumption. The apparatus further includes a controller configured to disable the secondary mixer and to enable the supplemental mixer to down-convert the secondary signal when operating in the diversity mode.

    Abstract translation: 公开了一种多模式接收机,其可重新配置以在分集模式下共享本地振荡器信号以节省功耗。 在一个示例性实施例中,一种装置包括主接收机,其具有被配置为对主信号进行下变频的主混合器和被配置为在载波聚合模式中对二级信号进行下变频的二级混合器。 该装置还包括补充混频器,其使用由分集模式中由共享主频率合成器产生的共享主本地振荡器(LO)信号以减少功耗。 该装置还包括控制器,其被配置为在分集模式下操作时禁用辅助混合器并且使辅助混频器能够对次级信号进行下变频。

    CANCELLING SUPPLY NOISE IN A VOLTAGE CONTROLLED OSCILLATOR CIRCUIT
    16.
    发明申请
    CANCELLING SUPPLY NOISE IN A VOLTAGE CONTROLLED OSCILLATOR CIRCUIT 审中-公开
    在电压控制的振荡器电路中取消电源噪声

    公开(公告)号:WO2014043531A1

    公开(公告)日:2014-03-20

    申请号:PCT/US2013/059757

    申请日:2013-09-13

    Abstract: A voltage controlled oscillator (VCO) core for cancelling a supply noise is described. The VCO core includes an input node that receives the supply noise. The VCO core also includes a noise path coupled to the input node. The VCO core additionally includes a cancellation path coupled to the input node and the noise path. The cancellation path includes a programmable gain circuit coupled with a first terminal of a varactor. The supply noise passes through the programmable gain circuit to produce a cancellation noise.

    Abstract translation: 描述了用于消除电源噪声的压控振荡器(VCO)芯。 VCO核心包括接收电源噪声的输入节点。 VCO核心还包括耦合到输入节点的噪声路径。 VCO核心还包括耦合到输入节点和噪声路径的消除路径。 消除路径包括与变容二极管的第一端子耦合的可编程增益电路。 电源噪声通过可编程增益电路产生消除噪声。

    LOW POWER LOCAL OSCILLATOR SIGNAL GENERATION
    17.
    发明申请
    LOW POWER LOCAL OSCILLATOR SIGNAL GENERATION 审中-公开
    低功率本地振荡器信号产生

    公开(公告)号:WO2014018179A1

    公开(公告)日:2014-01-30

    申请号:PCT/US2013/045381

    申请日:2013-06-12

    Abstract: A method and apparatus for providing an oscillating signal within a transmitter/receiver circuit is described. The transmitter/receiver circuit may include an oscillator that generates an oscillating signal that may be provided to a low power, low gain mixer of the transmitter/receiver circuit along a shorter circuit path that includes low power circuitry, such as low power buffers and low power frequency dividers. The oscillating signal may also be provided to a high power, high gain mixer along a longer circuit path that includes high power circuitry, such as high power buffers and high power frequency dividers. Specifically, the low power circuitry is adapted to consume less power in an ON state than the high power circuitry in an ON state, and the shorter circuit path has a shorter electrical path length than the longer circuit path.

    Abstract translation: 描述了一种用于在发射机/接收机电路内提供振荡信号的方法和装置。 发射机/接收机电路可以包括产生振荡信号的振荡器,该振荡信号可以沿着包括诸如低功率缓冲器和低功率缓冲器的低功率电路的较短电路路径提供给发射机/接收机电路的低功率低增益混频器 功率分频器 振荡信号还可以沿着包括高功率电路(例如高功率缓冲器和高功率分频器)的较长电路路径被提供给高功率高增益混频器。 具体地,低功率电路适于在ON状态下消耗比处于ON状态的高功率电路处于ON状态的更少的功率,并且较短的电路路径具有比较长电路路径更短的电路径长度。

    METHOD AND APPARATUS FOR PROCESSING A COMMUNICATION SIGNAL IN A RECEIVER
    18.
    发明申请
    METHOD AND APPARATUS FOR PROCESSING A COMMUNICATION SIGNAL IN A RECEIVER 审中-公开
    在接收机中处理通信信号的方法和装置

    公开(公告)号:WO2009129330A1

    公开(公告)日:2009-10-22

    申请号:PCT/US2009/040701

    申请日:2009-04-15

    CPC classification number: H04B1/109 H03F1/3205 H03F1/3211 H03F3/193 H03F3/245

    Abstract: A receiver includes a jammer detector configured to detect the presence or the absence of jamming in a communication signal within a gain state. The receiver further includes an amplifier configured to amplify the communication signal in a high linearity receiving mode or a low linearity receiving mode, wherein the high linearity receiving mode corresponds with a lower gain for the gain state in the amplifier relative to that of the low linearity receiving mode. In addition, the receiver includes a processing unit coupled to the jammer detector, the processing unit being configured to control the amplifier to amplify the communication signal in either the high linearity receiving mode or the low linearity receiving mode, based on the output of the jammer detector detecting the presence or the absence of jamming in the communication signal. A method is also provided for processing a communication signal in a receiver.

    Abstract translation: 接收机包括干扰检测器,其被配置为检测在增益状态内的通信信号中存在或不存在干扰。 接收器还包括放大器,被配置为以高线性度接收模式或低线性度接收模式放大通信信号,其中高线性度接收模式对应于放大器相对于低线性度的增益状态的较低增益 接收模式。 此外,接收机包括耦合到干扰检测器的处理单元,该处理单元被配置为基于干扰信号的输出来控制放大器以高线性接收模式或低线性接收模式放大通信信号 检测器检测通信信号中是否存在干扰。 还提供了一种用于处理接收机中的通信信号的方法。

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