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公开(公告)号：AU2597977A
公开(公告)日：1978-12-14
申请号：AU2597977
申请日：1977-06-09
Applicant: SONY CORP
Inventor： IIDA MIKIO , HOSOYA MITSURU
Abstract: A televison reciver for reproducing a picture selectively derived from a television signal or from an external video signal, including a television tuner having a variable reactance device as a tuning element, a video detector coupled to said television tuner and producing a television video signal at a television video signal output terminal, thereof a channel selector having a plurality of channel selecting switches for supplying a tuning voltage corresponding to a selected channel to the variable reactance device of said television tuner, an external video signal input terminal, a gate circuit operative to select a video signal either from said television video signal input terminal or from said external video signal input terminal, flip-flop circuit having first and second states for controlling said gate circuit, a switch for setting said flip-flop circuit to control the gate circuit to select an external video signal, and a reset circuit connected to said channel selecting switches for resetting said flip-flop circuit to control the gate circuit to select a television video signal.
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公开(公告)号：DE2726275A1
公开(公告)日：1977-12-22
申请号：DE2726275
申请日：1977-06-10
Applicant: SONY CORP
Inventor： IIDA MIKIO , HOSOYA MITSURU
Abstract: A television receiver for selectively reproducing either a picture of a television signal or an external video signal, having a television tuner using a signal controlled reactance device as a tuning element, a video detector coupled to said television tuner for producing a television video signal at a television video signal output terminal, a channel selector having a plurality of channel selecting switches for supplying a tuning signal corresponding to a selected channel to said signal controlled reactance device of said television tuner, an external video signal input terminal, a gate circuit for selecting one video signal from said television video signal input terminal or said external video signal input terminal, a flip-flop circuit for controlling said gate circuit, and a mode control switch for triggering said flip-flop.
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公开(公告)号：CA1147408A
公开(公告)日：1983-05-31
申请号：CA337769
申请日：1979-10-17
Applicant: SONY CORP
Inventor： HOSOYA MITSURU , ONODERA TOSHIO , TANIMURA KEN
Abstract: A fly-back transformer in which its low and high voltage windings are molded integral by resin material is disclosed. In this case, a winding receiving frame having an attaching means is integrally fixed to the peripheral edge portion on the terminal side surface of the molded body.
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公开(公告)号：CA1140641A
公开(公告)日：1983-02-01
申请号：CA343018
申请日：1980-01-04
Applicant: SONY CORP
Inventor： HAMAGUCHI KENJI , HOSOYA MITSURU
Abstract: A delay circuit is disclosed which uses a CTD (charge transfer device). The delay circuit has a signal delay circuit made of a CTD, a clock signal generator for driving the CTD, a pre-emphasis circuit for emphasizing a high frequency region of an input signal to the CTD, and a de-emphasis circuit for emphasizing a low frequency region of a signal delayed by the CTD. In this case, the de-emphasis circuit is so formed that it compensates for the characteristic of the pre-emphasis circuit and then makes a total response about flat. A stereophonic sound extending circuit is also disclosed which has a matrix circuit which composes left and right signals L and R and produces signal components R - .DELTA.L and L-.DELTA.R, a CTD delay circuit inserted into either one of left and right signals processing paths a pre-emphases circuit provided at an input stage of the CTD delay circuit, and a de-emphasis circuit provided at a rear stage of the CTD delay circuit.
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公开(公告)号：AU5440480A
公开(公告)日：1980-07-24
申请号：AU5440480
申请日：1980-01-07
Applicant: SONY CORP
Inventor： HAMAGUCHI KENJI , HOSOYA MITSURU
Abstract: In a delay circuit for delaying an input signal having a range extending over a higher- and a lower-frequency region, and in which a charge transfer device, such a bucket-brigade device, transfers a signal from an input to an output thereof in response to a clocking signal applied to the charge transfer device; a pre-emphasis circuit in advance of the charge transfer device emphasizes the input signal in its higher-frequency region, and a de-emphasis circuit after the charge transfer device emphasizes the signal at the output of the device in the lower-frequency region of the signal to compensate for the emphasis provided by the pre-emphasis circuit so that the delay circuit has a total response that is substantially flat. Such a delay circuit can be included in a stereophonic sound extending circuit to delay, by several milliseconds, one of left- and right-channel signals applied to a matrix circuit which provides extended signal components formed by combining each one of the left- and right-channel signals with a phase-inverted version of the other signal.
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Patent Agency Ranking
公开(公告)号：DE2726274A1
公开(公告)日：1977-12-22
申请号：DE2726274
申请日：1977-06-10
Applicant: SONY CORP
Inventor： IIDA MIKIO , HOSOYA MITSURU
Abstract: A televison reciver for reproducing a picture selectively derived from a television signal or from an external video signal, including a television tuner having a variable reactance device as a tuning element, a video detector coupled to said television tuner and producing a television video signal at a television video signal output terminal, thereof a channel selector having a plurality of channel selecting switches for supplying a tuning voltage corresponding to a selected channel to the variable reactance device of said television tuner, an external video signal input terminal, a gate circuit operative to select a video signal either from said television video signal input terminal or from said external video signal input terminal, flip-flop circuit having first and second states for controlling said gate circuit, a switch for setting said flip-flop circuit to control the gate circuit to select an external video signal, and a reset circuit connected to said channel selecting switches for resetting said flip-flop circuit to control the gate circuit to select a television video signal.
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公开(公告)号：EP0067887A4
公开(公告)日：1985-12-02
申请号：EP82900139
申请日：1981-12-25
Applicant: SONY CORP
Inventor： HOSOYA MITSURU , TSUCHIYA TAKAO , TOYODA NAOKUNI
CPC classification number: H04N5/14
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公开(公告)号：JPH021428B2
公开(公告)日：1990-01-11
申请号：JP18649580
申请日：1980-12-26
Applicant: SONY CORP
Inventor： HOSOYA MITSURU , TSUCHA TAKAHISA , TOYODA NAOKUNI
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公开(公告)号：JPS5596800A
公开(公告)日：1980-07-23
申请号：JP429679
申请日：1979-01-17
Applicant: SONY CORP
Inventor： HAMAGUCHI KENJI , HOSOYA MITSURU
Abstract: PURPOSE:To improve the S/N of a delay signal by providing an emphasis circuit in the preceding stage of the delay circuit using a charge transfer-type delay element in the transmission circuit applied suitably for the delay circuit of an acoustic field extending circuit. CONSTITUTION:In delay circuit 2, the output delay element 5 such as a BBD is sampled by sampling circuit 6 again and is supplied to LPF7. Then, oscillator 8 of clock pulses is provided. Here, it is noticed in the transmission circuit that noise components of the handled signal are distributed only in the high band side, and pre-emphasis circuit 10 and deemphasis circuit 11 are in the preceding stage and the succeeding stage of delay circuit 2, thereby improving the S/N of delay signal (left signal) L'. That is, emphasis to boost the high band side of signal L is applied previously in the preceding stage of delay circuit 2, and this high band side is cut in the succeeding stage, so that noise in the high band side can be lowered relatively. As a result, degradation of the S/N dependent upon increment of number n of stages can be compensated.
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