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公开(公告)号：JPH0394591A
公开(公告)日：1991-04-19
申请号：JP23114889
申请日：1989-09-06
Applicant: SONY CORP
Inventor： NUMAKURA TOSHIHIKO , YAMAMURA TAKAYA
Abstract: PURPOSE:To improve the reliability of a reproduced video signal which is suitable for an image monitor but is unsuitable for other recording systems by simply adding a dubbing disablement identification(ID) signal to a recording system, and in a reproducing system, deforming a vertical or horizontal blanking period part to form a reproduced video signal. CONSTITUTION:In the recording system, an input video signal to which a dubbing disablement ID signal is added without deforming itself is recorded in a recording medium. When the video signal to which the dubbing disablement ID signal is added is recorded in the recording medium and applied to the reproducing system, at least the vertical or horizontal blanking period part of the video signal read out from the recording medium or a signal included in the period part is made different from the state recorded in the recording medium to form a reproduced video signal. Although such kind of a reproduced video signal is suitable for the image monitor but is unsuitable for the recording system of another video signal recording/reproducing system, a reproduced signal from the reproducing system can be formed based upon the video signal read out from the recording medium under the comparatively large degree of freedom.
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公开(公告)号：JPH0358371A
公开(公告)日：1991-03-13
申请号：JP19350489
申请日：1989-07-26
Applicant: SONY CORP
Inventor： YAMAMURA TAKAYA
Abstract: PURPOSE:To record and regenerate a code signal irrespective of tracking of a rotary head or a hit of the head by turning the code signal into a low frequency signal and recording it is coinciding waveforms with each other between adjacent tracks. CONSTITUTION:The code signal is turned into the low frequency signal corresponding to a horizontal period of a diagonal track in phase, and moreover the code signal is shifted in accordance with an offset with an adjacent track of the diagonal track. Then, by recording this code signal in superimposing it upon an information signal, the waveforms of the code signal to be recorded between the adjacent tracks coincide with each other. Thus, by turning the code signal into the low frequency signal, influence of a spacing loss etc., is alleviated. In addition, by coinciding the waveforms between the adjacent tracks with each other, the code signal can be regenerated irrespective of the tracking and hit of the head.
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公开(公告)号：JPS6150273A
公开(公告)日：1986-03-12
申请号：JP17118684
申请日：1984-08-17
Applicant: Sony Corp
Inventor： MIYABE YUTAKA , YAMAMURA TAKAYA
CPC classification number: G11B15/005 , G11B27/107
Abstract: PURPOSE:To access a tape only by a reel motor by obtaining the timing of the acceleration stop and speed reduction through the arithmetic of the prescribed speed value and current and goal addresses. CONSTITUTION:A magnetic tape 1 is traveled along a tape guide drum 2. A reel motor 56 is controlled so that a speed up and down of the magnetic tape 1 is made possible at the prescribed speed-up control by a periodical speed modification. When a goal address where a tape position is accessed is given by a key device 25, a system control circuit 5 obtains the timing of a speed-up stop and speed-down start by the arithmetic of the prescribed speed-up value and goal and current addresses, and a system control circuit is controlled according to said timing. Namely, the reel motor 56 is controlled up to the timing of the speed-up stop, whereby the magnetic tape 1 is sped up at the prescribed acceleration. On the other hand, after the timing of the speed-down start passes, the reel motor 56 is controlled, and the magnetic tape 1 is sped down at the prescribed speed, whereby the tape position is accessed at the goal address.
Abstract translation: 目的：仅通过卷轴电机访问磁带，通过规定的速度值和当前和目标地址的算术获得加速停止和减速的定时。 构成：磁带1沿着导带鼓2行进。卷轴电动机56被控制，使得可以通过周期性速度修改在规定的加速控制下磁带1的上下速度。 当通过键装置25给出磁带位置的目标地址时，系统控制电路5通过规定的加速值和目标的算术来获得加速停止和减速开始的定时， 当前地址，并且系统控制电路根据所述定时被控制。 也就是说，卷轴电动机56被控制到加速停止的时刻，由此磁带1以规定的加速度加速。 另一方面，在减速开始的时刻过去之后，控制卷轴电动机56，并以规定的速度使磁带1下降，从而在目标地址处访问磁带位置。
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14.发明专利Method and circuit for detecting phase, and device for synchronizing phase 审中-公开用于检测相位的方法和电路，以及用于同步相位的装置
公开(公告)号：JP2003078409A
公开(公告)日：2003-03-14
申请号：JP2001262065
申请日：2001-08-30
Inventor： YAMAMURA TAKAYA , YAMAOKA SHINSUKE , KOTANI YASUTAKA , OSABE HISAO
Abstract: PROBLEM TO BE SOLVED: To provide a phase detecting method, a phase detecting circuit and a phase synchronizing device capable of performing frequency pulling by obtaining a differential value of a phase error even without performing exception handling. SOLUTION: This phase detecting method is provided with a detection step for detecting two sampling phases that sandwich zero cross among sampling phases, an interpolation step for interpolating and calculating a signal level of an intermediate phase of the two sampling phases, an addition step for adding the intermediate phase as a sampling phase, and a repeating step for repeating the detection step, the interpolation step, and the addition step N (N is a natural number) times, in order to detect phases of an electric signal, so that a stable phase error output can be obtained without signal level dependence by interpolating a signal level between sampling phases and calculating a zero cross phase of a signal and frequency pulling capability of phase synchronous processing is improved and frequency pulling processing is simplified.
Abstract translation: 要解决的问题：为了提供相位检测方法，相位检测电路和相位同步装置，即使不进行异常处理也能够通过获得相位误差的差分值来执行频率牵引。 解决方案：该相位检测方法具有用于检测采样相位之间夹杂零交叉的两个采样相位的检测步骤，用于内插和计算两个采样相位的中间相位的信号电平的插值步骤，添加步骤 中间相作为采样相位，以及重复步骤，用于重复检测步骤，插值步骤和相加步骤N（N为自然数）次，以检测电信号的相位，使得稳定的 可以通过内插采样相位之间的信号电平并计算信号的零交叉相位来获得相位误差输出，而不需要信号电平依赖性，并且提高了相位同步处理的拉频能力，并简化了频率拉伸处理。
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15.发明专利
公开(公告)号：JP2001298706A
公开(公告)日：2001-10-26
申请号：JP2000115070
申请日：2000-04-17
Applicant: SONY CORP
Inventor： ENOMOTO TAKURO , YOSHIHIRO TOSHITAKA , YAMAMURA TAKAYA , HAYAKAWA TOMOO
IPC: H04N5/783 , G11B20/10 , H04N5/92 , H04N19/103 , H04N19/134 , H04N19/176 , H04N19/46 , H04N19/60 , H04N19/625 , H04N19/70 , H04N7/30
Abstract: PROBLEM TO BE SOLVED: To easily fix a code quantity for data for special reproduction, SOLUTION: A compression section 1 compresses video data in compliance with the MPEG system. An I picture separation section 2 separates an I picture from the compressed video data. A special reproduction data generating section 3 extracts a DC component from a DCT coefficient of the I picture separated by the I picture separation section 2 and supplies the DC component to a data length adjustment section 4 as special reproduction data. The data length adjustment section 4 adjusts (limits) the length of the data from the special reproduction data generating section 3 and supplies the length of the data to a multiplexer section 5. The multiplexer section 5 multiplexes the video data from the compression section 1, the data from the data length adjustment section 4, compressed audio data separately supplied and prescribed system data. A recording format processing section 6 adds an error correction code to the multiplexed data from the multiplexer section 5, applies modulation processing to the multiplexed data and supplies the result to a rotary head (not shown), which records the resulting data to a magnetic tape 7.
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Patent Agency Ranking
公开(公告)号：JPH1042233A
公开(公告)日：1998-02-13
申请号：JP19126496
申请日：1996-07-19
Applicant: SONY CORP
Inventor： SUGIZAKI KIMINOBU , YAMAMURA TAKAYA
Abstract: PROBLEM TO BE SOLVED: To provide a miniaturizable and weight-reducable video reproducing device for recording hand shake correction data on a tape along with video data and reproducing images without hand shake based on the correction data. SOLUTION: A correction signal generation part 3 computes a correction amount from the output of a motion detection sensor 2 for detecting the motion of a video camera device main body and obtains a motion correction amount. An image pjckup part 6 converts object image light image-formed on a lens 4 to the video data. To the correction amount and the video data, error correction coding and a synthesizing processing are executed by an error correction coding/synthesizing processing part 6 and they are passed through a recording modulation processing part 7 and an amplifier 8 for recording and recorded on the tape 10 by a recording head 9.
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公开(公告)号：JPH04170294A
公开(公告)日：1992-06-17
申请号：JP29831390
申请日：1990-11-02
Applicant: SONY CORP
Inventor： YAMAMURA TAKAYA , TAUCHI YOICHIRO
Abstract: PURPOSE:To reduce distortion of a signal waveform at the inside and outside of a valid burst waveform area by giving an interpolation data to a sampling point located at the outside of the valid burst waveform area so as to record the signal. CONSTITUTION:A read only memory(ROM) 22 outputs a reproduction reference signal data S10 based on an address given by a reference data read signal S12 via selection circuits 18, 19. Then a burst signal data read as the reproduction reference signal data S10 is sequentially from an address 0 of the ROM 22. In this case, sampling point data at a sampling point, '0.2598' and '-0.2598' placed at both sides of a burst waveform representing a waveform of a valid waveform area specified by the sampling point of the burst signal data are read.
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公开(公告)号：JPH04167891A
公开(公告)日：1992-06-15
申请号：JP29409390
申请日：1990-10-31
Applicant: SONY CORP
Inventor： YAMAMURA TAKAYA
Abstract: PURPOSE:To improve the clamp accuracy at video reproduction by adding a clamp area of a reproduced reference signal recorded in addition to a video signal at least for each horizontal scanning period to a portion just before the video signal at the video signal recording. CONSTITUTION:When a timing generating circuit 7 of a SYNC/burst addition circuit 7 detects a PG signal from a pulse generator, the circuit 17 outputs a reference data read signal S12 and a selection switching signal S11 to a ROM 22 and selection circuits 18,19 respectively. The ROM 22 outputs a reproduced reference signal data S10 to the selection circuits 18,19 based on an address given by the S 12. The circuit 17 outputs the signal S11 in a prescribed time after the ROM 22 starts reading the S 10 to allow the circuits 18, 19 to select color line sequential data signals S8, S9 from the S 10. The clamp level is made constant by adding the clamp area to a portion just before the video signal in this way thereby improving the clamp accuracy of the reproduced video signal.
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公开(公告)号：JPH0397184A
公开(公告)日：1991-04-23
申请号：JP23359789
申请日：1989-09-08
Applicant: SONY CORP
Inventor： YAMAMURA TAKAYA
Abstract: PURPOSE:To provide an address in an excellent way with simple constitution by arranging an identification signal inserted intermittently according to predetermined pattern. CONSTITUTION:A timing signal from a timing generating circuit 5 is fed to a readout address generating circuit 7 and an address generated from the readout address generating circuit 7 is fed to an identification signal memory 9. Then a 1-bit control signal is outputted from the memory 9 according to a predetermined pattern corresponding to each horizontal period of the signal read from a recording memory 3. On the other hand, two kinds of synchronizing signals whose polarity is inverted to each other are outputted from synchronizing signal generating circuits 10, 11, the synchronizing signals are selected by a control signal from the memory 9 at a switch 12, the selected synchronizing signal is fed to an adder 8, from which a signal inserted with the identification signal is extracted. Thus, the address is given to each unit of the information signal and the address is provided in an excellent way with simple constitution.
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公开(公告)号：JP2003023352A
公开(公告)日：2003-01-24
申请号：JP2001208348
申请日：2001-07-09
Inventor： YAMAMURA TAKAYA , YAMAOKA SHINSUKE , KOTANI YASUTAKA , OSABE HISAO
Abstract: PROBLEM TO BE SOLVED: To provide a clock regeneration circuit in which frequency synchronization can be performed without exerting an adverse influence upon a clock regeneration part. SOLUTION: The clock regeneration circuit is provided with clock regeneration means (1-8) and frequency detecting means (9-14) and by using an edge counter 11 for frequency detection for frequency synchronization, error output provided by a digital controller oscillator(DCO) 8 and the edge counter 11 becomes a 0th-order error not to be integrated. Even when a phase shift occurs in a regenerated clock, just a single frequency occurs and errors do not continuously occur.
Abstract translation: 要解决的问题：提供一种时钟再生电路，其中可以执行频率同步而不对时钟再生部分产生不利影响。 解决方案：时钟再生电路设有时钟再生装置（1-8）和频率检测装置（9-14），并通过使用用于频率同步的频率检测的边沿计数器11，由数字控制振荡器（DCO）提供的误差输出 ）8，并且边缘计数器11变为不被积分的零级误差。 即使当在再生时钟中发生相移时，仅发生单个频率并且不会连续发生错误。
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