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    11.
    发明专利
    未知

    公开(公告)号：DE69610456D1

    公开(公告)日：2000-11-02

    申请号：DE69610456

    申请日：1996-05-06

    Applicant: ST MICROELECTRONICS SA

    Inventor： WUIDART LUC ,  BAILLY ALAIN

    IPC: H02M1/00 ,  H02M1/42 ,  H02M1/12 ,  H05B41/295

    Abstract: The rectifying process involves utilising a number of capacitors (C1,C2) of progressively decreasing value, connected across a rectifier output, in series with resistors (R1,R2) of progressively decreasing value. The discharge of these capacitors is blocked during the initial phase of the fall in the AC voltage applied to the rectifier (D1-D4) after the maximum of the cycle. The duration of the blocking of the capacitors is longer for the smaller value capacitors. As soon as a capacitor is unblocked and can discharge the currently discharging capacitor is blocked. The timing is controlled by comparison of the potential across the DC rails at each stage with a set reference value.

    12.
    发明专利
    未知

    公开(公告)号：AT196702T

    公开(公告)日：2000-10-15

    申请号：AT96410045

    申请日：1996-05-06

    Applicant: ST MICROELECTRONICS SA

    Inventor： WUIDART LUC ,  BAILLY ALAIN

    IPC: H02M1/00 ,  H02M1/42 ,  H02M1/12 ,  H05B41/295

    Abstract: The rectifying process involves utilising a number of capacitors (C1,C2) of progressively decreasing value, connected across a rectifier output, in series with resistors (R1,R2) of progressively decreasing value. The discharge of these capacitors is blocked during the initial phase of the fall in the AC voltage applied to the rectifier (D1-D4) after the maximum of the cycle. The duration of the blocking of the capacitors is longer for the smaller value capacitors. As soon as a capacitor is unblocked and can discharge the currently discharging capacitor is blocked. The timing is controlled by comparison of the potential across the DC rails at each stage with a set reference value.

    13.
    发明专利
    未知

    公开(公告)号：FR2816128B1

    公开(公告)日：2003-02-07

    申请号：FR0014015

    申请日：2000-10-31

    Applicant: ST MICROELECTRONICS SA

    Inventor： BAILLY ALAIN

    IPC: H02M3/335 ,  H02M3/28

    Abstract: A unit (21) consisting of a resistive and capacitive network measures the average value of the voltage (Vaux) at the terminals of the auxiliary winding at the end of its demagnetization period. The units time constant is low before the control pulse period of the switch (6). The unit receives the voltage (Vaux) from the auxiliary winding only during demagnetization periods of the secondary winding (7). The voltage converter has a switch (6) control circuit (11). The switch connects a current supply to a primary winding (5) of a transformer (4). One of the transformers secondary windings (7) is connected to a capacitor (C2) which provides a continuous regulated output voltage (Vout). An auxiliary winding (8) of transformer provides a voltage supply to the control circuit. Sensors (23,24) detect the demagnetization periods of the auxiliary winding (8).

    16.
    发明专利
    未知

    公开(公告)号：DE60025635T2

    公开(公告)日：2006-11-02

    申请号：DE60025635

    申请日：2000-09-28

    Applicant: ST MICROELECTRONICS SA

    Inventor： BAILLY ALAIN ,  BARRET JEAN

    IPC: H02M3/28 ,  H02M3/335 ,  H03K17/082

    Abstract: The invention concerns a control circuit ( 20 ) of a switch ( 6 ) chopping a voltage supply of a primary winding of a power converter transformer, comprising means ( 45 ) for detecting the current in the switch in closed state after a predetermined time following each closure of said switch, and a comparator ( 40 ) of said current relative to a threshold (Ilim), the result of said comparator being taken into account for a predetermined time interval close to the beginning of a closing cycle of said chopping switch.

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