DUPLEX TRANSMISSION METHOD FOR ELECTROMAGNETIC TRANSPONDER SYSTEM

    公开(公告)号:JP2000332647A

    公开(公告)日:2000-11-30

    申请号:JP2000104892

    申请日:2000-04-06

    Abstract: PROBLEM TO BE SOLVED: To provide a method for duplex transmission between a terminal and a transponder in an electromagnetic transponder system. SOLUTION: Each of the terminal 40 and the transponder 10 is provided with an oscillation circuit 24, a modulation means and a demodulation means, the amplitude modulation transmission of a signal to be transmitted from the terminal 40 to the transponder 10 and the transmission of a signal from the transponder 10 to the terminal 40 and suited so as to follow the phase demodulation of the terminal 40 are simultaneously executed and an amplitude modulation rate is

    13.
    发明专利
    未知

    公开(公告)号:DE60041298D1

    公开(公告)日:2009-02-26

    申请号:DE60041298

    申请日:2000-04-06

    Abstract: A terminal (40) and a transponder (10) contain a corresponding oscillating circuit (Li,Ci,24,L2,C2). An AM transmission of a signal sends a boundary-mark toward the transponder a signal (Rx) undergo a phase demodulation in the boundary-mark. The depth o modulation (tm) of the amplitude is lower than 100%. An Independent claim is included for: (a) a terminal for performing a claimed method (b) a transponder

    16.
    发明专利
    未知

    公开(公告)号:DE69835328T2

    公开(公告)日:2007-08-23

    申请号:DE69835328

    申请日:1998-11-20

    Abstract: The fluorescent lamp (T) has a bridge rectifier (10) for the incoming low frequency mains supply. The rectifier output (11, 12) is bridged by a switch (M) driven at high frequency to provide a chopped current. Inductors (40, 41) are connected in series in two arms of the bridge and are connected by a switch (36, 37, 38) to form an energy recovery circuit.

    19.
    发明专利
    未知

    公开(公告)号:FR2823341B1

    公开(公告)日:2003-07-25

    申请号:FR0104585

    申请日:2001-04-04

    Abstract: The invention concerns an identification method and circuit ( 1 ) of the network type of parameters contained in an integrated circuit chip, comprising a single input terminal ( 2 ) for applying a signal (E) triggering an identification, the output terminals ( 3 1 , 3 2 , 3 i-1 , 3 i , 3 n-1 , 3 n ) adapted to deliver a binary identifying code (B 1 , B 2 , B i-1 , B i , B n-1 , B n ), first electrical paths P 1 , P 2 , P i , P n ), individually connecting said input terminal to each output terminal, and means ( 4, 5 1 , 5 2 , 5 i , 5 n ) for simultaneously integrating the binary states present in output of the electrical paths, each path inputting a delay sensitive to technological dispersions and/or of the integrated circuit fabrication method.

    20.
    发明专利
    未知

    公开(公告)号:FR2833119A1

    公开(公告)日:2003-06-06

    申请号:FR0115529

    申请日:2001-11-30

    Abstract: A digital identifier specific to integrated circuit chip is extracted from a physical parameter network (PPN) linked to integrated circuit chip manufacturing. The extracted identifier is submitted to several linear retroaction shift registers (20'), in order to output corresponding secret or encryption key. An Independent claim is also included for circuit for generating secret or encryption key.

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