公开(公告)号：FR2809884B1

公开(公告)日：2002-11-29

申请号：FR0007016

申请日：2000-05-31

Applicant: ST MICROELECTRONICS SA

Inventor： DAVIDESCU DRAGOS

IPC: H03K5/00 ,  H03K5/13 ,  H04B15/04 ,  H03K5/06

公开(公告)号：FR2822971A1

公开(公告)日：2002-10-04

申请号：FR0104529

申请日：2001-04-03

Applicant: ST MICROELECTRONICS SA

Inventor： LINK JEAN FRANCOIS ,  DAVIDESCU DRAGOS

IPC: G06F1/00 ,  G06F12/14 ,  G06F21/79

Abstract: Access control to protected data stored in a storage unit, in particular a read-only memory, is implemented with storage means (2) having a protected zone (2a) for storing protected data and a command input (CS, CS-R) for denying or authorising access to said data, and with validating means (4) for controlling a request for access to the protected data by acting selectively on the command input. The system incorporates an internal key, stored for example in the protected zone, and comprises means for inputting an input key provided from outside, the validating means (4) authorising access to the protected data when there is conformity between the internal key and the input key.

公开(公告)号：FR2857111B1

公开(公告)日：2005-10-07

申请号：FR0308053

申请日：2003-07-02

Applicant: ST MICROELECTRONICS SA

Inventor： FERRAND OLIVIER ,  DAVIDESCU DRAGOS

IPC: G06F1/24 ,  G06F11/00 ,  H03K19/00

Abstract: The microcontroller has a reset circuit (3) that selectively generates a reset signal for resetting a microprocessor (2). A detection device (4) has an input (5) for receiving a critical logic signal from the microprocessor. The detection device has an output that applies a reset command on the reset circuit, upon detecting a change in the logic state of the logic signal.

公开(公告)号：FR2793087B1

公开(公告)日：2001-06-29

申请号：FR9905396

申请日：1999-04-28

Applicant: ST MICROELECTRONICS SA

Inventor： DAVIDESCU DRAGOS

IPC: H03F1/30 ,  H03F3/45

Abstract: An operational amplifier is provided that includes an inverting input channel, a non-inverting input channel, and an output stage. Each of the input channels controls at least one input transistor, and the output stage supplies an output voltage as a function of a potential difference at the input channels. Additionally, the operational amplifier includes at least one signal correction element in association with at least one of the input channels. The signal correction element is selectively put into circuit to selectively add an offset voltage correction signal to a signal that is supplied to the output stage in order to balance the characteristics of the two input channels. Also provided is a circuit for correcting the offset voltage of an operational amplifier. The circuit includes means for determining the output voltage of the operational amplifier, means for applying a reference voltage to one of the inputs of the operational amplifier, means for selectively coupling the inputs of the operational amplifier, and programming means for programming the placing of at least one signal correction element into circuit. Additionally, a method is provided for correcting the offset voltage of an operational amplifier in which an offset correction signal is determined by an iteration of cycles.