Abstract:
A circuit and method are disclosed for relatively rapidly causing the current flowing through a write head to transition between steady states without generating an appreciable amount of capacitively-coupled noise. Embodiments of the present invention generally provide drive voltage signals to the write head that have no common mode voltage levels during transitions between steady state current levels in the write head. In other words, the drive voltage signals applied to the write head are substantially entirely differential during write head current transitions. In an exemplary embodiment of the present invention, a driver circuit (100) includes switching circuitry (111,112,113,114,116,117,118,119) connected between the terminals (42A,42B) of the write head (42) and reference voltage supplies, such as positive and negative voltage supplies. The driver circuit further includes timing circuitry (125) that generates control signals for controlling the switching circuitry.
Abstract:
A preamplifier for correcting for thermal asperity transients in disk drives using magneto resistive read heads. The preamplifier has an input gain stage receiving a signal from the read head and an output buffer outputting a reader output to a read channel that is filtered of thermal asperity transients by a high pass filter positioned between the input gain stage and the output buffer. The high pass filter is voltage controlled based on an input control signal from a filter controller. The filter controller uses a low pass filter functioning as a peak detector to detect peaks in either the input or output voltage of the high pass filter. The low pass filter output is applied to a non-linear function generator generating the control signal for the high pass filter based on an increasing function of the absolute value of the low pass filter output.
Abstract:
A circuit and method are disclosed for relatively rapidly causing the current flowing through a write head to transition between steady states without generating an appreciable amount of capacitively-coupled noise. Embodiments of the present invention generally provide drive voltage signals to the write head that have no common mode voltage levels during transitions between steady state current levels in the write head. In other words, the drive voltage signals applied to the write head are substantially entirely differential during write head current transitions. In an exemplary embodiment of the present invention, a driver circuit (100) includes switching circuitry (111,112,113,114,116,117,118,119) connected between the terminals (42A,42B) of the write head (42) and reference voltage supplies, such as positive and negative voltage supplies. The driver circuit further includes timing circuitry (125) that generates control signals for controlling the switching circuitry.
Abstract:
A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a current source, such as a MOS transistor, connected to the input node of a capacitor. During the overshoot duration, the current source operates at saturation to generate a pulsed current with an amplitude of half the load current. The circuit includes another transistor in series with the current generator between the capacitor and the driver output. A forward bias diode is connected between the capacitor output node and high voltage reference and enters reverse bias during overshoot duration swinging the driver output voltage above supply voltage.
Abstract:
A write driver for driving a write current through a write head connected to the write head by an interconnect or flexible transmission line. The write driver includes a circuit matching an output impedance of the write driver to the odd characteristic impedance of the interconnect and includes a current source generating a current output to the write head. The write driver provides a current amplification effect as the output current is half the write current driven through the write coil. The impedance matching circuit includes an output resistor with a resistance equal to the odd characteristic impedance of the interconnect. The write driver includes a voltage source that operates to maintain a voltage drop of zero on the output resistor during the initial period of twice the transmission delay of the interconnect.
Abstract:
A write driver for driving a write current through a write head connected to the write head by an interconnect or flexible transmission line. The write driver includes a circuit matching an output impedance of the write driver to the odd characteristic impedance of the interconnect and includes a current source generating a current output to the write head. The write driver provides a current amplification effect as the output current is half the write current driven through the write coil. The impedance matching circuit includes an output resistor with a resistance equal to the odd characteristic impedance of the interconnect. The write driver includes a voltage source that operates to maintain a voltage drop of zero on the output resistor during the initial period of twice the transmission delay of the interconnect.
Abstract:
A circuit for controlling the write head (101) of a magnetic disk storage device includes a pull-up device (104) coupled to a terminal (101a) of the write head, for selectively providing a current to the write head through the terminal, parallel-connected first (106) and second (107) current sink circuits, each coupled to the write head terminal and selectively activated to draw current from the write head. A control circuit (130) individually activates the pull-up device and the first and second current sink circuits to reverse the direction of current flow through the write head. When the current nears the desired current level, the second current sink circuit is deactivated and the pull-up device is immediately activated for a predetermined period of time. Current overshoot and undershoot of the write head current is minimized.
Abstract:
A method is disclosed for controlling the write head of a magnetic disk storage device. The method includes sinking current from the first terminal (2A) of the write head (2) and sourcing current to the second terminal (2B) of the write head substantially simultaneously with sinking current from the first terminal so that a first steady state voltage level appears on the first terminal of the write head and a second steady state voltage level appears on the second terminal thereof that are approximately at a midpoint between a high reference voltage level and a low reference voltage level. The common mode voltage of the write head is substantially constant over time.