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    EXTRACTION D'UN CODE BINAIRE A PARTIR DE PARAMETRES PHYSIQUES D'UN CIRCUIT INTEGRE
    11.
    发明申请
    EXTRACTION D'UN CODE BINAIRE A PARTIR DE PARAMETRES PHYSIQUES D'UN CIRCUIT INTEGRE 审中-公开
    从集成电路的物理参数中提取二进制代码

    公开(公告)号：WO2003069626A1

    公开(公告)日：2003-08-21

    申请号：PCT/FR2003/000444

    申请日：2003-02-11

    Applicant: STMicroelectronics S.A.

    Inventor： WUIDART, Luc ,  MALHERBE, Alexandre ,  BARDOUILLET, Michel

    IPC: G11C5/00

    CPC classification number: G11C14/00 ,  H03K3/356008

    Abstract: L'invention concerne un procédé d'extraction et une cellule intégrée (1) d'extraction d'une valeur binaire à partir d'une propagation d'un front d'un signal de déclenchement dans deux chemins électriques, comprenant entre deux bornes (2, 3) d'application d'une tension : deux branches parallèles comprenant chacune, en série, une résistance (Rg, Rd) de différenciation des chemins électriques ; un transistor de lecture (MNld, MNlg), le point milieu entre la résistance et le transistor de lecture de chaque branche définissant une borne de sortie (Q, NQ) de la cellule, et la grille du transistor de lecture de chaque branche étant reliée à la borne de sortie de l'autre branche ; et un transistor de sélection (MN2d, MN2g).

    Abstract translation: 本发明涉及一种用于从两个电气路径中的触发信号前沿的传播中提取二进制值的方法和集成单元（1），包括位于两个施加电压端子（2,3）之间的两个并联支路。 所述腿分别设置有串联安装的以下元件：电路微分电阻（Rg，Rd）; 读出晶体管（MNld，MNlg）; 和选择晶体管（MN2d，MN2g）。 每个支路的电阻和读出晶体管之间的中心点限定单元的出口端子（Q，NQ），并且每条支路的读出晶体管栅极连接到另一支路的输出端子。

    TRANSPONDEUR ELECTROMAGNETIQUE A CODE PROGRAMMABLE
    12.
    发明公开
    TRANSPONDEUR ELECTROMAGNETIQUE A CODE PROGRAMMABLE 有权
    与可编程CODE电磁应答

    公开(公告)号：EP1476849A2

    公开(公告)日：2004-11-17

    申请号：EP03718862.0

    申请日：2003-02-11

    Applicant: STMicroelectronics S.A.

    Inventor： WUIDART, Luc ,  BARDOUILLET, Michel

    IPC: G06K19/07 ,  G06K19/067 ,  G11C11/56

    CPC classification number: G11C17/14 ,  G06K19/067 ,  G06K19/0723

    Abstract: The invention relates to an electromagnetic transponder (20) comprising: a parallel oscillatory circuit (L2, C2) for extracting a supply signal from a radiated field; a plurality of legs which are arranged in parallel on the oscillatory circuit and respectively comprise a programmable resistance (Rpi) and an interrupter (Mi); and a cyclic control element (27) for successively closing the interrupters. Each resistance embodies an element for storing part of the code stored in the transponder.

    EXTRACTION D'UN CODE BINAIRE A PARTIR DE PARAMETRES PHYSIQUES D'UN CIRCUIT INTEGRE
    13.
    发明授权
    EXTRACTION D'UN CODE BINAIRE A PARTIR DE PARAMETRES PHYSIQUES D'UN CIRCUIT INTEGRE 有权
    排水集成电路的物理参数的二进制码的

    公开(公告)号：EP1476872B1

    公开(公告)日：2009-06-10

    申请号：EP03718863.8

    申请日：2003-02-11

    Applicant: STMicroelectronics S.A.

    Inventor： WUIDART, Luc ,  MALHERBE, Alexandre ,  BARDOUILLET, Michel

    IPC: G11C5/00 ,  G11C14/00 ,  H03K3/356

    CPC classification number: G11C14/00 ,  H03K3/356008

    Abstract: The invention relates to a method and an integrated cell (1) for extracting a binary value from a propagation of a trigger signal front in two electrical paths comprising two parallel legs located between two voltage application terminals (2, 3). Said legs are respectively provided with the following elements mounted in series: an electrical path differentiation resistance (Rg, Rd); a readout transistor (MNld, MNlg); and a selection transistor (MN2d, MN2g). The central point between the resistance and the readout transistor of each leg defines an outlet terminal (Q, NQ) of the cell, and the readout transistor gate of each leg is connected to the output terminal of the other leg.

    STOCKAGE D'UN CODE BINAIRE IMMUABLE DANS UN CIRCUIT INTEGRE
    16.
    发明授权
    STOCKAGE D'UN CODE BINAIRE IMMUABLE DANS UN CIRCUIT INTEGRE 有权
    存储不变的二进制在集成电路

    公开(公告)号：EP1374242B1

    公开(公告)日：2004-08-18

    申请号：EP02730355.1

    申请日：2002-04-04

    Applicant: STMicroelectronics S.A.

    Inventor： BARDOUILLET, Michel ,  WUIDART, Luc

    IPC: G11C5/00 ,  G11C8/20 ,  H03K5/15

    CPC classification number: G11C5/00 ,  G11C8/20 ,  H03K5/15 ,  H03K5/15066

    Abstract: The invention concerns a circuit (1) for storing a binary code (B1, B2, , Bi-1, Bi, , Bn-1, Bn) in an integrated circuit chip, comprising an input terminal (2) applying a signal (E) triggering reading of the code, output terminals (31, 32, , 3i-1, 3i, , 3n-1, 3n) for delivering said binary code, first electrical paths (P1, P2, , Pi, , Pn) individually connecting said input terminal to each output terminal, each path inputting a fixed delay in the manufacture of the integrated circuit, and means (4, 51, 52, , 5i, , 5n) simultaneously integrating the binary states present in output of the electrical paths.

    IDENTIFICATION D'UN CIRCUIT INTEGRE A PARTIR DE SES PARAMETRES PHYSIQUES DE FABRICATION
    17.
    发明公开
    IDENTIFICATION D'UN CIRCUIT INTEGRE A PARTIR DE SES PARAMETRES PHYSIQUES DE FABRICATION 有权
    标识的集成电路物理生产参数作者：

    公开(公告)号：EP1397806A1

    公开(公告)日：2004-03-17

    申请号：EP02730354.4

    申请日：2002-04-04

    Applicant: STMicroelectronics S.A.

    Inventor： BARDOUILLET, Michel ,  WUIDART, Luc

    IPC: G11C5/00 ,  G11C8/20

    CPC classification number: G11C5/00 ,  G11C8/20 ,  H03K5/15066 ,  H03K5/19

    Abstract: The invention concerns an identification method and circuit (1) of the network type of parameters contained in an integrated circuit chip, comprising a single input terminal (2) for applying a signal (E) triggering an identification, the output terminals (31, 32, , 3i-1, 3i , , 3n-1, 3n) adapted to deliver a binary identifying code (B1, B2, Bi-1, Bi, , Bn-1, Bn), first electrical paths (P1, P2, , Pi, , Pn), individually connecting said input terminal to each output terminal, and means (4, 51, 52, , 5i, , 5n) for simultaneously integrating the binary states present in output of the electrical paths, each path inputting a delay sensitive to technological dispersions and/or of the integrated circuit fabrication method.

    STOCKAGE D'UN CODE BINAIRE IMMUABLE DANS UN CIRCUIT INTEGRE
    18.
    发明公开
    STOCKAGE D'UN CODE BINAIRE IMMUABLE DANS UN CIRCUIT INTEGRE 有权
    联合国代码BINAIRE IMMUABLE DANS UN CIRCUIT INTEGRE

    公开(公告)号：EP1374242A1

    公开(公告)日：2004-01-02

    申请号：EP02730355.1

    申请日：2002-04-04

    Applicant: STMicroelectronics S.A.

    Inventor： BARDOUILLET, Michel ,  WUIDART, Luc

    IPC: G11C5/00 ,  G11C8/20 ,  H03K5/15

    CPC classification number: G11C5/00 ,  G11C8/20 ,  H03K5/15 ,  H03K5/15066

    Abstract: The invention concerns a circuit (1) for storing a binary code (B1, B2, , Bi-1, Bi, , Bn-1, Bn) in an integrated circuit chip, comprising an input terminal (2) applying a signal (E) triggering reading of the code, output terminals (31, 32, , 3i-1, 3i, , 3n-1, 3n) for delivering said binary code, first electrical paths (P1, P2, , Pi, , Pn) individually connecting said input terminal to each output terminal, each path inputting a fixed delay in the manufacture of the integrated circuit, and means (4, 51, 52, , 5i, , 5n) simultaneously integrating the binary states present in output of the electrical paths.

    Abstract translation: 本发明涉及用于在集成电路芯片中存储二进制码（B1，B2，...，Bi-1，Bi，...，Bn-1，Bn）的电路（1），其包括输入端子（2） ）触发代码的读取，用于传送所述二进制代码的输出端子（31,32,3i-1,3i，3n-1,3n），分别连接第一电路径（P1，P2，...，Pn） 所述输入端子连接到每个输出端子，每个路径在集成电路的制造中输入固定的延迟;以及同时对存在于电路径的输出中的二进制状态进行积分的装置（4,51,52,5i，...，5n）。

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