公开(公告)号：EP1001526B1

公开(公告)日：2005-04-20

申请号：EP98830685.8

申请日：1998-11-13

Applicant: STMicroelectronics S.r.l.

Inventor： Botti, Edoardo ,  Grosso, Antonio ,  Masini, Marco

IPC: H03F3/217

CPC classification number: H03F3/2173

公开(公告)号：EP1178388A1

公开(公告)日：2002-02-06

申请号：EP00830560.9

申请日：2000-08-04

Applicant: STMicroelectronics S.r.l.

Inventor： Grosso, Antonio ,  Botti, Edoardo

IPC: G06F1/025 ,  H03L7/00 ,  H03M1/68

CPC classification number: H03M1/825 ,  G06F1/025 ,  H03F3/217 ,  H03F2200/342 ,  H03F2200/351 ,  H03K7/08

Abstract: A PWM power amplifier is herein described comprising at least one PCM/PWM converter (2, 3, 20, 30) which is fed by PCM digital input signals (Ip, Is) and produces PWM digital output signals (Op, Os, Opn, Ops), and at least one power amplification final stage (10, 101, 102) of the PWM digital output signals (Op, Os, Opn, Ops) by said at least one PCM/PWM converter (2, 3, 20, 30). At least one PCM/PWM converter (2, 3, 20, 30) comprises a counter (up-counter, up-down counter) fed with at least one clock signal (E) produced by a clock generator device (5) and comprising a digital comparator (8) suitable for comparing said PCM digital input signals (Ip, Is) of at least one PCM/PWM converter (2, 3, 20, 30) with a digital comparison signal (B, Z) produced by the counter (up-counter, up-down counter) and producing in output the PWM digital signals (Op, Os, Opn, Ops). The clock generator device (5) comprises a pulse generator device (6) and an oscillator (7); the pulse generator device (6) receives a signal at a frequency (Fin*k) which is equal to the frequency of the PCM digital input signals (Ip, Is) of said at least one PCM/PWM converter (2, 3, 20, 30) and produces in output reset pulses (IR). The reset pulses (IR) are sent in input to the oscillator (7) which produces in output said at least one clock signal (E).

Abstract translation: 这里描述的PWM功率放大器包括由PCM数字输入信号（Ip，Is）馈送的至少一个PCM / PWM转换器（2,3,20,30），并产生PWM数字输出信号（Op，Os，Opn， 以及由所述至少一个PCM / PWM转换器（2,3,20,30）的PWM数字输出信号（Op，Os，Opn，Ops）的至少一个功率放大最终级（10,101,102） ）。 至少一个PCM / PWM转换器（2,3,20,30）包括馈送有由时钟发生器装置（5）产生的至少一个时钟信号（E）的计数器（向上计数器，递增计数器），并且包括 适于将至少一个PCM / PWM转换器（2,3,20,30）的PCM数字输入信号（Ip，Is）与由计数器产生的数字比较信号（B，Z）进行比较的数字比较器（8） （上计数器，升降计数器），并输出PWM数字信号（Op，Os，Opn，Ops）。 时钟发生器装置（5）包括脉冲发生器装置（6）和振荡器（7）; 脉冲发生器装置（6）以与所述至少一个PCM / PWM转换器（2,3,20）的PCM数字输入信号（Ip，Is）的频率相等的频率（Fin * k）接收信号 ，30）并产生输出复位脉冲（IR）。 复位脉冲（IR）在输入端发送到振荡器（7），在所述振荡器（7）中输出所述至少一个时钟信号（E）。