公开(公告)号：EP1237185A3

公开(公告)日：2003-07-30

申请号：EP02003714.9

申请日：2002-02-19

Applicant: STMicroelectronics S.r.l.

Inventor： Rainieri, Vito ,  Saggio, Mario

IPC: H01L21/76 ,  H01L21/265 ,  H01L21/762

CPC classification number: H01L21/76224 ,  H01L21/7602

Abstract: A method for forming isolating structures in a silicon carbide layer (1,8) comprises the following steps: depositing a masking layer (2) onto the silicon carbide layer (1,8); and forming openings (2a) through said masking layer (2) to expose portions of the silicon carbide layer (1,8); and further comprises the steps of:ion implanting the whole chip surface;heat treating the entire surface of the silicon carbide layer (1,8) to form an oxide layer (4) having a first portion (5) with a first thickness in said at least one region (3), and having a second portion (6) with a second thickness at said silicon carbide layer (1,8).

公开(公告)号：EP1237185A2

公开(公告)日：2002-09-04

申请号：EP02003714.9

申请日：2002-02-19

Applicant: STMicroelectronics S.r.l.

Inventor： Rainieri, Vito ,  Saggio, Mario

IPC: H01L21/76 ,  H01L21/265 ,  H01L21/762

CPC classification number: H01L21/76224 ,  H01L21/7602

Abstract: A method for forming isolating structures in a silicon carbide layer (1,8) comprises the following steps:

depositing a masking layer (2) onto the silicon carbide layer (1,8); and
forming openings (2a) through said masking layer (2) to expose portions of the silicon carbide layer (1,8); and further comprises the steps of:

ion implanting the whole chip surface;
heat treating the entire surface of the silicon carbide layer (1,8) to form an oxide layer (4) having a first portion (5) with a first thickness in said at least one region (3), and having a second portion (6) with a second thickness at said silicon carbide layer (1,8).

Abstract translation: 在碳化硅层（1,8）中形成隔离结构的方法包括以下步骤：将掩模层（2）沉积到碳化硅层（1,8）上; 以及通过所述掩模层（2）形成开口（2a）以暴露所述碳化硅层（1,8）的部分; 并且还包括以下步骤：离子注入整个芯片表面; 热处理碳化硅层（1,8）的整个表面以形成在所述至少一个区域（3）中具有第一厚度的第一部分（5）的氧化物层（4），并且具有第二部分 6）在所述碳化硅层（1,8）处具有第二厚度。

公开(公告)号：EP1081812A1

公开(公告)日：2001-03-07

申请号：EP99830544.5

申请日：1999-09-02

Applicant: STMicroelectronics S.r.l. ,  CNR-IMETEM

Inventor： Coffa, Salvatore ,  Libertino, Sebania ,  Saggio, Mario ,  Frisina, Ferruccio

IPC: H01S3/16 ,  H01S5/32

CPC classification number: H01S5/305 ,  H01S3/1603 ,  H01S3/1628 ,  H01S5/3004 ,  H01S5/3068

Abstract: The invention relates to a semiconductor device for electro-optic applications of the type including at least a rare-earth ions doped P/N junction integrated on a semiconductor substrate. This device may be used to obtain laser action in Silicon and comprises a cavity or a waveguide and a coherent light source obtained incorporating the rare-earth ions, and specifically Erbium ions, in the depletion layer of said P/N junction.
The junction may be for instance the base-collector region of a bipolar transistor and is reverse biased.

Abstract translation: 本发明涉及一种用于电光应用的半导体器件，其包括至少掺杂在半导体衬底上的稀土离子掺杂的P / N结。 该装置可以用于在硅中获得激光作用，并且包括在所述P / N结的耗尽层中获得的掺杂有稀土离子，特别是铒离子的空腔或波导和相干光源。 结可以是例如双极晶体管的基极 - 集电极区域并且被反向偏置。