公开(公告)号：US20160370815A1

公开(公告)日：2016-12-22

申请号：US14960052

申请日：2015-12-04

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Sotirios Athanasiou ,  Julien Le Coz ,  Sylvain Engels

IPC: G05F1/46

CPC classification number: G05F1/463 ,  H01L23/345 ,  H01L27/0251 ,  H01L27/0629 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic device includes an integrated circuit with a MOS transistor and a heating circuit electrically coupled to at least two points of one of the source or drain semiconductive region of the transistor. A portion of the source or drain semiconductive region between the two points forms a resistive element. The heating circuit is configured to cause a current to circulate through the resistive element between the two points to heat an active region of the transistor.

Abstract translation: 电子器件包括具有MOS晶体管的集成电路和与该晶体管的源极或半导体半导体区域中的至少两个点的至少两个点电耦合的加热电路。 两点之间的源极或漏极半导体区域的一部分形成电阻元件。 加热电路被配置为使电流在两个点之间循环通过电阻元件，以加热晶体管的有源区。

公开(公告)号：US10211201B2

公开(公告)日：2019-02-19

申请号：US15914387

申请日：2018-03-07

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Sotirios Athanasiou

IPC: H01L27/02 ,  H01L27/06 ,  H01L27/12 ,  H01L29/45

Abstract: An ESD protection device includes a MOS transistor connected between a first terminal and a second terminal and having a gate region, source/drain region and a well region electrically coupled by a resistive-capacitive circuit configured to control turn on of the MOS transistor in response to an ESD event. The resistive-capacitive circuit has a common part with at least one of the source, gate or drain regions of the MOS transistor and includes a capacitive element and a resistive element. A first electrode of the capacitive element is formed by the resistive element and a second electrode of the capacitive element is formed by at least a portion of a semiconductor film within which the source/drain region is formed.

公开(公告)号：US10128242B2

公开(公告)日：2018-11-13

申请号：US15804669

申请日：2017-11-06

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Sotirios Athanasiou

IPC: H01L27/092 ,  H01L27/12 ,  H01L29/786 ,  H01L29/08 ,  H01L29/10 ,  H01L29/165 ,  H01L23/528 ,  H01L21/8238 ,  H01L21/84 ,  H01L29/66

Abstract: A substrate contact land for a first MOS transistor is produced in and on an active zone of a substrate of silicon on insulator type using a second MOS transistor without any PN junction that is also provided in the active zone. A contact land on at least one of a source or drain region of the second MOS transistor forms the substrate contact land.

公开(公告)号：US10096708B2

公开(公告)日：2018-10-09

申请号：US15230699

申请日：2016-08-08

Applicant: STMicroelectronics SA

Inventor： Sotirios Athanasiou ,  Philippe Galy

IPC: H01L29/78 ,  H01L27/12 ,  H01L23/528 ,  H01L21/84 ,  H01L29/66 ,  H01L21/74 ,  H01L29/786

Abstract: An integrated electronic device includes a semiconductive film above a buried insulating layer that is situated above a supporting substrate. An active zone is delimited within the semiconductive film. A MOS transistor supported within the active zone includes a gate region situated above the active zone. The gate region includes a rectilinear part situated between source and drain regions. The gate region further includes a forked part extending from the rectilinear part. A raised semiconductive region situated above the active zone is positioned at least partly between portions of the forked part. A substrate contact for the transistor is electrically coupled to the raised semiconductive region.

公开(公告)号：US20180197848A1

公开(公告)日：2018-07-12

申请号：US15914387

申请日：2018-03-07

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Sotirios Athanasiou

IPC: H01L27/02 ,  H01L27/06 ,  H01L27/12 ,  H01L29/45

CPC classification number: H01L27/0266 ,  H01L27/0629 ,  H01L27/1203 ,  H01L29/456

Abstract: An ESD protection device includes a MOS transistor connected between a first terminal and a second terminal and having a gate region, source/drain region and a well region electrically coupled by a resistive-capacitive circuit configured to control turn on of the MOS transistor in response to an ESD event. The resistive-capacitive circuit has a common part with at least one of the source, gate or drain regions of the MOS transistor and includes a capacitive element and a resistive element. A first electrode of the capacitive element is formed by the resistive element and a second electrode of the capacitive element is formed by at least a portion of a semiconductor film within which the source/drain region is formed.

公开(公告)号：US20180012965A1

公开(公告)日：2018-01-11

申请号：US15427656

申请日：2017-02-08

Applicant: STMicroelectronics SA

Inventor： Sotirios Athanasiou ,  Philippe Galy

IPC: H01L29/36 ,  H01L29/786

CPC classification number: H01L29/36 ,  H01L29/78603 ,  H01L29/78615 ,  H01L29/78648

Abstract: A transistor includes a quasi-intrinsic region of a first conductivity type that is covered with an insulated gate. The quasi-intrinsic region extends between two first doped regions of a second conductivity type. A main electrode is provided on each of the two first doped regions. A second doped region of a second conductivity type is position in contact with the quasi-intrinsic region, but is electrically and physically separated by a distance from the two first doped regions. A control electrode is provided on the second doped region.

公开(公告)号：US09837413B2

公开(公告)日：2017-12-05

申请号：US15041593

申请日：2016-02-11

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Sotirios Athanasiou

IPC: H01L27/092 ,  H01L27/12 ,  H01L29/78 ,  H01L21/84 ,  H01L29/786 ,  H01L21/8238 ,  H01L23/528 ,  H01L21/82 ,  H01L29/10 ,  H01L29/165 ,  H01L29/08

CPC classification number: H01L27/092 ,  H01L21/8238 ,  H01L21/823871 ,  H01L21/84 ,  H01L23/528 ,  H01L27/1203 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/165 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78615 ,  H01L29/78648 ,  H01L29/78654

Abstract: A substrate contact land for a first MOS transistor is produced in and on an active zone of a substrate of silicon on insulator type using a second MOS transistor without any PN junction that is also provided in the active zone. A contact land on at least one of a source or drain region of the second MOS transistor forms the substrate contact land.