公开(公告)号：US20230318609A1

公开(公告)日：2023-10-05

申请号：US17709642

申请日：2022-03-31

Applicant: Silicon Laboratories Inc.

Inventor： Rangakrishnan Srinivasan ,  Zhongda Wang ,  Francesco Barale ,  Wenhuan Yu ,  Mustafa H. Koroglu ,  Yan Zhou ,  Terry L. Dickey

IPC: H03L7/107 ,  H03L7/099

CPC classification number: H03L7/1075 ,  H04B1/40 ,  H03L7/099

Abstract: A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.

公开(公告)号：US20230099832A1

公开(公告)日：2023-03-30

申请号：US17490255

申请日：2021-09-30

Applicant: Silicon Laboratories Inc.

Inventor： Euisoo Yoo ,  Arup Mukherji ,  Rangakrishnan Srinivasan ,  Vitor Pereira ,  Zhongda Wang ,  Sriharsha Vasadi

IPC: H04B1/00 ,  H03F3/195 ,  H03H7/38

Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.