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公开(公告)号：US10256854B1
公开(公告)日：2019-04-09
申请号：US15875278
申请日：2018-01-19
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Sriharsha Vasadi , Zhongda Wang , Mustafa H. Koroglu , John M. Khoury , Aslamali A. Rafi , Michael S. Johnson , Francesco Barale , Sherry Xiaohong Wu
Abstract: In an embodiment, an apparatus includes: a transmit circuit to upconvert a baseband signal to a first differential radio frequency (RF) signal, the transmit circuit to convert the first differential RF signal to a first single-ended RF signal; a duty cycle correction circuit coupled to the transmit circuit to receive the first single-ended RF signal and compensate for a duty cycle variation in the first single-ended RF signal to output a duty cycle-corrected RF signal; a conversion circuit to convert the duty cycle-corrected RF signal to a second differential RF signal; and an interface circuit to transfer the second differential RF signal from a first ground domain to a second ground domain.
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公开(公告)号：US20210175855A1
公开(公告)日：2021-06-10
申请号：US16705868
申请日：2019-12-06
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L. Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
Abstract: A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to use the delayed oscillating signal for transmitting a signal, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
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公开(公告)号：US11973509B2
公开(公告)日：2024-04-30
申请号：US17709642
申请日：2022-03-31
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Zhongda Wang , Francesco Barale , Wenhuan Yu , Mustafa H. Koroglu , Yan Zhou , Terry L. Dickey
CPC classification number: H03L7/1075 , H03L7/099 , H04B1/40
Abstract: A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.
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公开(公告)号：US20240022268A1
公开(公告)日：2024-01-18
申请号：US18474395
申请日：2023-09-26
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
CPC classification number: H04B1/0064 , H03F3/195 , H03H7/38 , H03F2200/451 , H03F2200/294
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
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公开(公告)号：US12212349B2
公开(公告)日：2025-01-28
申请号：US18474395
申请日：2023-09-26
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
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Patent Agency Ranking
公开(公告)号：US11804862B2
公开(公告)日：2023-10-31
申请号：US17490255
申请日：2021-09-30
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
CPC classification number: H04B1/0064 , H03F3/195 , H03H7/38 , H03F2200/294 , H03F2200/451
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
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7.发明公开公开(公告)号：US20240267005A1
公开(公告)日：2024-08-08
申请号：US18639872
申请日：2024-04-18
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L. Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F1/26 , H03B5/04 , H03F1/30 , H03F3/245 , H03K5/00 , H03F2200/375 , H03K2005/00019
Abstract: A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to amplify the delayed oscillating signal for transmission sufficient to produce interference, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
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公开(公告)号：US12028024B2
公开(公告)日：2024-07-02
申请号：US16705868
申请日：2019-12-06
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F1/26 , H03B5/04 , H03F1/30 , H03F3/245 , H03K5/00 , H03F2200/375 , H03K2005/00019
Abstract: A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to use the delayed oscillating signal for transmitting a signal, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
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公开(公告)号：US20240110972A1
公开(公告)日：2024-04-04
申请号：US18174003
申请日：2023-02-24
Applicant: Silicon Laboratories Inc.
Inventor： Anant Verma , Rangakrishnan Srinivasan , Zhongda Wang
CPC classification number: G01R31/2824 , H04B17/14 , H04L27/12
Abstract: Modulation testing separately enables slices of an analog varactor array of an LC oscillator. For each enabled slice, a reference voltage supplying a resistor ladder is set to a plurality of different reference voltage values. Resistor ladder voltages generated for the different reference voltage values are supplied to the enabled slice and a control voltage coupled to the enabled slice is swept for each of the reference voltage values. Respective frequencies of an oscillator signal coupled to an output of the LC oscillator are measured for each enabled slice for each combination of the reference voltage values and the control voltage values. The linearity of LC oscillator gain is determined for each of the reference voltage values for each slice based on the respective frequencies and the control voltage values. Passing/failing the modulation testing is based on the linearity of the LC oscillator gain.
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公开(公告)号：US20240106398A1
公开(公告)日：2024-03-28
申请号：US17955171
申请日：2022-09-28
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Sriharsha Vasadi , Mustafa Koroglu , Zhongda Wang , Euisoo Yoo , Eddy Bell
CPC classification number: H03F3/245 , H04B1/0475 , H03F2200/451
Abstract: In one aspect, an apparatus comprises: a driver circuit to receive first and second ramp signals and output first and second drive signals under control of a first bias signal and a second bias signal, the first bias signal having a first edge and a second edge, the second edge having a different edge rate than the first edge, the second bias signal having a third edge and a fourth edge, the third edge having a different edge rate than the fourth edge; and an output circuit coupled to the driver circuit, the output circuit comprising at least one first active device to be driven by the first drive signal and at least one second active device to be driven by the second drive signal, where the output circuit is to amplify and output a radio frequency (RF) signal.
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