中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

48 records (took 0.029 seconds)

    Error diffusion filter for DMD display
    12.
    发明公开
    Error diffusion filter for DMD display 失效
    用于DMD显示误差扩散过滤器

    公开(公告)号：EP0704835A3

    公开(公告)日：1996-05-22

    申请号：EP95114890.7

    申请日：1995-09-21

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Doherty, Donald B. ,  Pettitt, Gregory ,  Markandey, Vishal

    IPC: G09G3/34

    CPC classification number: G09G3/346 ,  G09G3/2007 ,  G09G3/2022 ,  G09G3/2059 ,  G09G2330/10 ,  H04N5/7441

    Abstract: A DMD display system includes an inverse gamma look-up-table (50) for converting raster scanned, gamma corrected video data of 8 bits to 12 bits inverse gamma data with 8 most significant bits (msb) and 4 least significant bits (lsb). The 8 msb are coupled to the micromirror of the DMD display (10) and the four lsb are delayed and halved such that one half of the lsb is added to the next pixel in the horizontal scan and one-half of the lsb is added to the next vertical pixel one line length delayed due to degamma. For each input intensity in, the output intensity in will be displayed on the DMD device. If the degamma was perfect and there was no lack of bits, the value displayed in the DMD would be some other value N1. We compute the difference between N and N1 and distribute this difference (error) among the neighboring pixels. The error can be distributed among the neighbors in various ways. One implementation is shown in Fig. 4. A further advantage of the present invention is that the defect compensation can be performed as part of this algorithm. For this, the DMD coordinates of defective pixels need to be known and the error diffusion needs to be modified to account for the fact that at those locations the pixel displays either bright (stuck ON), dark (stuck OFF) or neutral (flat pixel).

    Improvements in video data formatters
    13.
    发明公开
    Improvements in video data formatters 失效
    在改进图像数据格式设施。

    公开(公告)号：EP0651581A3

    公开(公告)日：1996-05-08

    申请号：EP94116987.2

    申请日：1994-10-27

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Gove, Robert J ,  Doherty, Donald B. ,  Heimbuch, Scott D. ,  Urbanus, Paul M. ,  Marshall, Stephen W. ,  Markandey, Vishal ,  Meyer, Richard C.

    IPC: H04N7/26

    CPC classification number: H04N9/3147 ,  H04N5/14 ,  H04N5/4401 ,  H04N5/7458 ,  H04N7/0122 ,  H04N19/30 ,  H04N19/423 ,  H04N19/436 ,  H04N19/61 ,  H04N21/4402 ,  H04N2005/7466

    Abstract: A digital television system (10) is provided. System (10) may receive a video signal at composite video interface and separation circuit (16). The video signal is separated into component form by composite video interface and separation circuit (16). The component video signals are converted to digital component video signals in analog to digital converter circuit (18). Line slicer (14) divides each line of digital component video signal into a plurality of channels such that each channel may be processed in parallel by channel signal processors (22a) through (22d). Each channel signal processor (22a) through (22d) may provide two lines of output for each line of video input. The processed digital component video signals may be formatted for displays (26a) through (26c) in formatters (24a) through (24c). Each formatter (24a) through (24c) may comprise a plurality of first in-first out buffer memories (34a) through (34j). One of each channel signal processors (22a) through (22d) may be coupled to two of first in-first out buffer memories (34a) through (34j). Additionally, each formatter (24a) through (24c) may comprise channel data format units (38a) through (38d), each associated with a channel of, for example, display (24a). Channel data format units (38a) through (38d) are coupled to appropriate of first in-first out buffer memories (34a) through (34j) via multiplexers (36a) through (36d). Each formatter (24a) through (24c) may remove overlap between channels of system (10) and may format the processed video signal into appropriate channels for displays (26a) through (26c).

    Discrete bit colour display system
    16.
    发明公开
    Discrete bit colour display system 审中-公开
    离散位彩色显示系统

    公开(公告)号：EP1521480A2

    公开(公告)日：2005-04-06

    申请号：EP04104310.0

    申请日：2004-09-07

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Pettitt, Gregory S. ,  Doherty, Donald B.

    IPC: H04N9/31

    Abstract: Methods and apparatus for use with a discrete bit display system such as a DLP® display system for increasing brightness by using secondary light bits (such as spoke bits that are otherwise wasted). The light available from the secondary bits is distributed over the entire input/output dynamic range by determining the maximum possible output and then defining the dynamic output range from zero to that maximum range in response to the full range of the input signals. R, G and B input signals (151, 153, 155) are provided to a primary pulse select circuit (157) for each pixel of a display frame. The same signals (151, 153, 155) are also provided to a color ratio calculation circuitry (161) which provides the ability to select color ratio indexing into a three dimensional look-up table (3D LUT) which provides gained R,G, B signals. A dynamic range adjustment circuit (217) looks at the gained R, G and B signals, and if any of these signals are greater than the normal dynamic range of the display, then the out of range signal is adjusted by the use of a white, secondary, pulse or spoke bit as determined by circuit (217).

    Abstract translation: 与诸如DLP显示系统的离散位显示系统一起使用的方法和设备，用于通过使用次级光位（例如，否则被浪费的辐条位）来增加亮度。 通过确定最大可能输出，然后定义从零到该最大范围的动态输出范围，以响应全范围的输入信号，从次级位可用的光分布在整个输入/输出动态范围内。 R，G和B输入信号（151,153,155）被提供给用于显示帧的每个像素的主脉冲选择电路（157）。 同样的信号（151,153,155）也被提供给色比计算电路（161），该色比率计算电路提供选择色比指数到三维查找表（3D LUT）中的能力，该三维查找表提供获得的R，G， B信号。 动态范围调节电路（217）查看所获得的R，G和B信号，并且如果这些信号中的任何一个大于显示器的正常动态范围，则通过使用白色 ，由电路（217）确定的次级，脉冲或轮辐位。

Patent Agency Ranking