公开(公告)号：EP0662773B1

公开(公告)日：1999-06-30

申请号：EP95100124.7

申请日：1995-01-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Heimbuch, Scott D. ,  Sampsell, Jeffrey B. ,  Gove, Robert J. ,  Marshall, Stephen W. ,  Doherty, Donald B. ,  Sextro, Gary L. ,  Davis, Carl W. ,  Egan, Joseph G.

IPC: H04N9/31 ,  H04N9/30

CPC classification number: G09G3/2025 ,  G09G3/34 ,  G09G3/346 ,  G09G2310/0235 ,  H04N9/30 ,  H04N9/3114

公开(公告)号：EP0662773A1

公开(公告)日：1995-07-12

申请号：EP95100124.7

申请日：1995-01-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Heimbuch, Scott D. ,  Sampsell, Jeffrey B. ,  Gove, Robert J. ,  Marshall, Stephen W. ,  Doherty, Donald B. ,  Sextro, Gary L. ,  Davis, Carl W. ,  Egan, Joseph G.

IPC: H04N9/31 ,  H04N9/30

CPC classification number: G09G3/2025 ,  G09G3/34 ,  G09G3/346 ,  G09G2310/0235 ,  H04N9/30 ,  H04N9/3114

Abstract: A sequential color system is provided in which a processor (22) is coupled to a memory (24) and a receiver (27). Images are generated by shining light from a light source (28) through a color wheel (30) and onto DMD array (26). Light from the DMD array (26) is shone on screen (32). By adjusting the speed and make-up of color wheel (30) color separation is greatly reduced or eliminated. Also disclosed are techniques for sequential imaging which may be applied to other technologies, such as CRT technologies.

Abstract translation: 提供了一种顺序色彩系统，其中处理器（22）耦合到存储器（24）和接收器（27）。 通过将来自光源（28）的光通过色轮（30）发射到DMD阵列（26）上而产生图像。 来自DMD阵列（26）的光照在屏幕（32）上。 通过调节色轮的速度和组成（30），颜色分离大大减少或消除。 还公开了用于顺序成像的技术，其可以应用于诸如CRT技术的其它技术。

公开(公告)号：EP0671644B1

公开(公告)日：2001-06-20

申请号：EP95103049.3

申请日：1995-03-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gale, Richard O. ,  Lawson, Randall S. ,  Cleveland, Harlan P. ,  Davis, Carl W. ,  Tew, Claude E. ,  Chu, Henry ,  Heimbuch, Scott D.

IPC: G02B26/08

CPC classification number: G02B26/0833 ,  G02B26/0841 ,  Y10S359/904

公开(公告)号：EP0651580A2

公开(公告)日：1995-05-03

申请号：EP94116986.4

申请日：1994-10-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gove, Robert J. ,  Doherty, Donald B. ,  Marshall, Stephen W. ,  Davis, Carl W. ,  Egan, Joseph G. ,  Meyer, Richard C. ,  Sampsell, Jeffrey B. ,  Heimbuch, Scott D. ,  Markandey, Vishal

IPC: H04N7/26

CPC classification number: H04N9/3147 ,  H04N5/14 ,  H04N5/4401 ,  H04N5/7458 ,  H04N7/0122 ,  H04N19/30 ,  H04N19/423 ,  H04N19/436 ,  H04N19/61 ,  H04N21/4402 ,  H04N2005/7466

Abstract: A system (30) for packing data into a video processor is provided. System (30) comprises demultiplexer (32), first and second first in-first out buffer memories (34) and (36), and multiplexer (38). Demultiplexer (32) divides a field of video data into first and second parts (42) and (44). First and second parts (42) and (44) are stored in first first in-first out buffer memories (34) and (36), respectively. Multiplexer (38) combines one line from first first in-first out buffer memory (34) with one line from second first in-first out buffer memory (36) to form a single line for processing.

Abstract translation: 一种用于包装数据到视频处理器系统（30）设置。 系统（30）包括多路分解器（32），第一和第二先入先出缓冲存储器（34）和（36），以及多路复用器（38）。 多路分解器（32）把视频数据的场分成第一和第二部分（42）和（44）。 第一和第二部分（42）和（44）被存储在第一先入先出缓冲存储器（34）和（36）表示。 多路复用器（38）组合从第一先入先出缓冲存储器（34），与来自第二个第一一条线一条线入先出缓冲存储器（36），以形成用于处理一行。

公开(公告)号：EP0651580B1

公开(公告)日：2002-01-30

申请号：EP94116986.4

申请日：1994-10-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gove, Robert J. ,  Doherty, Donald B. ,  Marshall, Stephen W. ,  Davis, Carl W. ,  Egan, Joseph G. ,  Meyer, Richard C. ,  Sampsell, Jeffrey B. ,  Heimbuch, Scott D. ,  Markandey, Vishal

IPC: H04N7/26

CPC classification number: H04N9/3147 ,  H04N5/14 ,  H04N5/4401 ,  H04N5/7458 ,  H04N7/0122 ,  H04N19/30 ,  H04N19/423 ,  H04N19/436 ,  H04N19/61 ,  H04N21/4402 ,  H04N2005/7466

公开(公告)号：EP0651580A3

公开(公告)日：1996-05-08

申请号：EP94116986.4

申请日：1994-10-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gove, Robert J. ,  Doherty, Donald B. ,  Marshall, Stephen W. ,  Davis, Carl W. ,  Egan, Joseph G. ,  Meyer, Richard C. ,  Sampsell, Jeffrey B. ,  Heimbuch, Scott D. ,  Markandey, Vishal

IPC: H04N7/26

CPC classification number: H04N9/3147 ,  H04N5/14 ,  H04N5/4401 ,  H04N5/7458 ,  H04N7/0122 ,  H04N19/30 ,  H04N19/423 ,  H04N19/436 ,  H04N19/61 ,  H04N21/4402 ,  H04N2005/7466

Abstract: A system (30) for packing data into a video processor is provided. System (30) comprises demultiplexer (32), first and second first in-first out buffer memories (34) and (36), and multiplexer (38). Demultiplexer (32) divides a field of video data into first and second parts (42) and (44). First and second parts (42) and (44) are stored in first first in-first out buffer memories (34) and (36), respectively. Multiplexer (38) combines one line from first first in-first out buffer memory (34) with one line from second first in-first out buffer memory (36) to form a single line for processing.

公开(公告)号：EP0671644A1

公开(公告)日：1995-09-13

申请号：EP95103049.3

申请日：1995-03-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gale, Richard O. ,  Lawson, Randall S. ,  Cleveland, Harlan P. ,  Davis, Carl W. ,  Tew, Claude E. ,  Chu, Henry ,  Heimbuch, Scott D.

IPC: G02B26/08

CPC classification number: G02B26/0833 ,  G02B26/0841 ,  Y10S359/904

Abstract: A method for controlling a digital micromirror device 40 resulting in decreased mechanical stress, longer device lifetimes, decreased incidence of spontaneous bit reset, and increased pulse-width modulation accuracy. To reduce the device stress, the bias voltage 142 applied to the mirror 50 may be reduced after the mirror 50 has been latched. To prevent premature mirror changes, the address electrode bias voltage 140 may be reduced after the mirror is driven to the desired position. To ensure that the mirror 50 returns to the neutral position during reset, the mirror bias voltage 142 may be raised from ground potential to approximately hallway between the two addressing voltages during the reset period 152 . To reduce the effects of hinge memory and to ensure that the mirror 50 rotates toward the proper address electrode, the mirror bias voltage 142 may be gradually increased to allow the mirror 50 time to rotate towards the proper address electrode.