Abstract:
A film-to-video format detector (24) for a digital television receiver (10). The detector (24) receives pixel data from a current field and a second preceding field. It determines a set of pixel difference values, sums them to obtain a field difference value, and compares the field difference value to a threshold. These steps are repeated to obtain a series of field difference indicators. This series is analyzed to determine whether it has a pattern corresponding to a film-to-video format.
Abstract:
A method of adjusting color temperature of images displayed by a display system (10) whose images are based on sequential pixel data and are filtered with a color wheel (15, 15', 15''). The relative display times for each color are adjusted to result in a corresponding adjustment of color temperature. In a first embodiment (Figure 2), the size of the color wheel's segments are changed as well as the display times for data corresponding to each segment. In a second embodiment (Figure 3), the display times for data corresponding to one or more segments are decreased with a black display time to fill in the difference.
Abstract:
A digital television system (10) is provided. System (10) may receive a video signal at composite video interface and separation circuit (16). The video signal is separated into component form by composite video interface and separation circuit (16). The component video signals are converted to digital component video signals in analog to digital converter circuit (18). Line slicer (14) divides each line of digital component video signal into a plurality of channels such that each channel may be processed in parallel by channel signal processors (22a) through (22d). Each channel signal processor (22a) through (22d) may provide two lines of output for each line of video input. The processed digital component video signals may be formatted for displays (26a) through (26c) in formatters (24a) through (24c). Each formatter (24a) through (24c) may comprise a plurality of first in-first out buffer memories (34a) through (34j). One of each channel signal processors (22a) through (22d) may be coupled to two of first in-first out buffer memories (34a) through (34j). Additionally, each formatter (24a) through (24c) may comprise channel data format units (38a) through (38d), each associated with a channel of, for example, display (24a). Channel data format units (38a) through (38d) are coupled to appropriate of first in-first out buffer memories (34a) through (34j) via multiplexers (36a) through (36d). Each formatter (24a) through (24c) may remove overlap between channels of system (10) and may format the processed video signal into appropriate channels for displays (26a) through (26c).
Abstract:
A film-to-video format detector (24) for a digital television receiver (10). The detector (24) receives pixel data from a current field and a second preceding field. It determines a set of pixel difference values, sums them to obtain a field difference value, and compares the field difference value to a threshold. These steps are repeated to obtain a series of field difference indicators. This series is analyzed to determine whether it has a pattern corresponding to a film-to-video format.
Abstract:
A system (10) for processing pixel video data having a selectable number of bits is provided. The system (10) comprises first, second and third video processors (12), (14) and (16). The first video processor (12) receives and processes pixel data of a luminance video signal. The second video processor (14) may receive and process pixel data of a chrominance video signal and may generate one of first, second and third video signal outputs. The third video processor (16) may process the chrominance video signal and may also generate at least two of the output video signals.
Abstract:
A system (30) for packing data into a video processor is provided. System (30) comprises demultiplexer (32), first and second first in-first out buffer memories (34) and (36), and multiplexer (38). Demultiplexer (32) divides a field of video data into first and second parts (42) and (44). First and second parts (42) and (44) are stored in first first in-first out buffer memories (34) and (36), respectively. Multiplexer (38) combines one line from first first in-first out buffer memory (34) with one line from second first in-first out buffer memory (36) to form a single line for processing.