公开(公告)号：US09966425B1

公开(公告)日：2018-05-08

申请号：US15445953

申请日：2017-02-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jen-Po Huang ,  Chin-Fu Lin ,  Bin-Siang Tsai ,  Xu Yang Shen ,  Seng Wah Liau ,  Yen-Chen Chen ,  Ko-Wei Lin ,  Chun-Ling Lin ,  Kuo-Chih Lai ,  Ai-Sen Liu ,  Chun-Yuan Wu ,  Yang-Ju Lu

IPC: H01L21/8242 ,  H01L49/02

CPC classification number: H01L28/56 ,  H01L28/60

Abstract: A method for fabricating a metal-insulator-metal (MIM) capacitor includes the steps of: forming a capacitor bottom metal (CBM) layer on a material layer; forming a silicon layer on the CBM layer; forming a capacitor dielectric layer on the silicon layer; and forming a capacitor top metal (CTM) layer on the capacitor dielectric layer.

公开(公告)号：US20170076995A1

公开(公告)日：2017-03-16

申请号：US14880693

申请日：2015-10-12

Applicant: United Microelectronics Corp.

Inventor： Yun-Tzu Chang ,  Shih-Min Chou ,  Kuo-Chih Lai ,  Ching-Yun Chang ,  Hsiang-Chieh Yen ,  Yen-Chen Chen ,  Yang-Ju Lu ,  Nien-Ting Ho ,  Chi-Mao Hsu

IPC: H01L21/8238

CPC classification number: H01L21/823842

Abstract: A method for modulating a work function of a semiconductor device having a metal gate structure including the following steps is provided. A first stacked gate structure and a second stacked gate structure having an identical structure are provided on a substrate. The first stacked gate structure and the second stacked gate structure respectively include a first work function metal layer of a first type. A patterned hard mask layer is formed. The patterned hard mask layer exposes the first work function metal layer of the first stacked gate structure and covers the first work function metal layer of the second stacked gate structure. A first gas treatment is performed to the first work function metal layer of the first stacked gate structure exposed by the patterned hard mask layer. A gas used in the first gas treatment includes nitrogen-containing gas or oxygen-containing gas.

Abstract translation: 提供了一种用于调制具有包括以下步骤的金属栅极结构的半导体器件的功函数的方法。 在基板上设置具有相同结构的第一堆叠栅极结构和第二堆叠栅极结构。 第一堆叠栅极结构和第二堆叠栅极结构分别包括第一类型的第一功函数金属层。 形成图案化的硬掩模层。 图案化的硬掩模层暴露第一堆叠栅极结构的第一功函数金属层并且覆盖第二堆叠栅极结构的第一功函数金属层。 对由图案化的硬掩模层暴露的第一堆叠栅极结构的第一功函数金属层进行第一气体处理。 在第一气体处理中使用的气体包括含氮气体或含氧气体。

公开(公告)号：US20230178657A1

公开(公告)日：2023-06-08

申请号：US18103505

申请日：2023-01-31

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chien-Ming Lai ,  Yen-Chen Chen ,  Jen-Po Huang ,  Sheng-Yao Huang ,  Hui-Ling Chen ,  Qinggang Xing ,  Ding-Lung Chen ,  Li Li Ding ,  Yao-Hung Liu

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/51 ,  H01L29/423 ,  H01L29/49 ,  H01L29/10

CPC classification number: H01L29/7869 ,  H01L29/66742 ,  H01L29/51 ,  H01L29/4236 ,  H01L29/4966 ,  H01L29/1037

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

公开(公告)号：US20210126131A1

公开(公告)日：2021-04-29

申请号：US17140114

申请日：2021-01-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chien-Ming Lai ,  Yen-Chen Chen ,  Jen-Po Huang ,  Sheng-Yao Huang ,  Hui-Ling Chen ,  Qinggang Xing ,  Ding-Lung Chen ,  Li Li Ding ,  Yao-Hung Liu

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/51 ,  H01L29/423 ,  H01L29/49 ,  H01L29/10

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

公开(公告)号：US20190267492A1

公开(公告)日：2019-08-29

申请号：US16413425

申请日：2019-05-15

Applicant: United Microelectronics Corp.

Inventor： Yen-Chen Chen ,  Xiao Wu ,  Hai Tao Liu ,  Ming Hua Du ,  Shouguo Zhang ,  Yao-Hung Liu ,  Chin-Fu Lin ,  Chun-Yuan Wu

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/24 ,  H01L29/45

Abstract: A semiconductor device includes an oxide semiconductor layer, disposed over a substrate. A source electrode of a metal nitride is disposed on the oxide semiconductor layer. A drain electrode of the metal nitride is disposed on the oxide semiconductor layer. A metal-nitride oxidation layer is formed on a surface of the source electrode and the drain electrode. A ratio of a thickness of the metal-nitride oxidation layer to a thickness of the drain electrode or the source electrode is equal to or less than 0.2.

公开(公告)号：US10340350B2

公开(公告)日：2019-07-02

申请号：US16044581

申请日：2018-07-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shih-Min Chou ,  Yun-Tzu Chang ,  Wei-Ning Chen ,  Wei-Ming Hsiao ,  Chia-Chang Hsu ,  Kuo-Chih Lai ,  Yang-Ju Lu ,  Yen-Chen Chen ,  Chun-Yao Yang

IPC: H01L29/76 ,  H01L29/94 ,  H01L29/423 ,  H01L29/06 ,  H01L29/49 ,  H01L29/51 ,  H01L21/02 ,  H01L21/28 ,  H01L21/762 ,  H01L27/088 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/3213 ,  H01L21/8234

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes an isolation layer, a gate dielectric layer, a tantalum nitride layer, a tantalum oxynitride layer, an n type work function metal layer and a filling metal. The isolation layer is formed on a substrate, and the isolation layer has a first gate trench. The gate dielectric layer is formed in the first gate trench, the tantalum nitride layer is formed on the gate dielectric layer, and the tantalum oxynitride layer is formed on the tantalum nitride layer. The n type work function metal layer is formed on the tantalum oxynitride layer in the first gate trench, and the filling metal is formed on the n type work function metal layer in the first gate trench.

公开(公告)号：US20180138263A1

公开(公告)日：2018-05-17

申请号：US15350453

申请日：2016-11-14

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ko-Wei Lin ,  Yen-Chen Chen ,  Chin-Fu Lin ,  Chun-Yuan Wu ,  Chun-Ling Lin

IPC: H01L49/02

CPC classification number: H01L28/75

Abstract: A semiconductor structure includes a capacitor. The capacitor includes a bottom electrode, a first high-k dielectric layer, a second high-k dielectric layer and a top electrode. The bottom electrode includes a first layer and a second layer disposed on the first layer. The bottom electrode is formed of TiN. The first layer has a crystallization structure. The second layer has an amorphous structure. The first high-k dielectric layer is disposed on the bottom electrode. The first high-k dielectric layer is formed of TiO2. The second high-k dielectric layer is disposed on the first high-k dielectric layer. The second high-k dielectric layer is formed of a material different from TiO2. The top electrode is disposed on the second high-k dielectric layer.

公开(公告)号：US09728467B2

公开(公告)日：2017-08-08

申请号：US14880693

申请日：2015-10-12

Applicant: United Microelectronics Corp.

Inventor： Yun-Tzu Chang ,  Shih-Min Chou ,  Kuo-Chih Lai ,  Ching-Yun Chang ,  Hsiang-Chieh Yen ,  Yen-Chen Chen ,  Yang-Ju Lu ,  Nien-Ting Ho ,  Chi-Mao Hsu

IPC: H01L21/302 ,  H01L29/788 ,  H01L21/28 ,  H01L21/8238

CPC classification number: H01L21/823842

Abstract: A method for modulating a work function of a semiconductor device having a metal gate structure including the following steps is provided. A first stacked gate structure and a second stacked gate structure having an identical structure are provided on a substrate. The first stacked gate structure and the second stacked gate structure respectively include a first work function metal layer of a first type. A patterned hard mask layer is formed. The patterned hard mask layer exposes the first work function metal layer of the first stacked gate structure and covers the first work function metal layer of the second stacked gate structure. A first gas treatment is performed to the first work function metal layer of the first stacked gate structure exposed by the patterned hard mask layer. A gas used in the first gas treatment includes nitrogen-containing gas or oxygen-containing gas.

公开(公告)号：US11631771B2

公开(公告)日：2023-04-18

申请号：US17367637

申请日：2021-07-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chien-Ming Lai ,  Yen-Chen Chen ,  Jen-Po Huang ,  Sheng-Yao Huang ,  Hui-Ling Chen ,  Qinggang Xing ,  Ding-Lung Chen ,  Li Li Ding ,  Yao-Hung Liu

IPC: H01L29/76 ,  H01L29/786 ,  H01L29/66 ,  H01L29/51 ,  H01L29/423 ,  H01L29/49 ,  H01L29/10

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

公开(公告)号：US11476367B2

公开(公告)日：2022-10-18

申请号：US17409461

申请日：2021-08-23

Applicant: United Microelectronics Corp.

Inventor： Yen-Chen Chen ,  Xiao Wu ,  Hai Tao Liu ,  Ming Hua Du ,  Shouguo Zhang ,  Yao-Hung Liu ,  Chin-Fu Lin ,  Chun-Yuan Wu

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/66 ,  H01L29/45 ,  H01L29/417

Abstract: A semiconductor device includes an oxide semiconductor layer, disposed over a substrate. A source electrode of a metal nitride is disposed on the oxide semiconductor layer. A drain electrode of the metal nitride is disposed on the oxide semiconductor layer. A metal-nitride oxidation layer is formed on a surface of the source electrode and the drain electrode. A ratio of a thickness of the metal-nitride oxidation layer to a thickness of the drain electrode or the source electrode is equal to or less than 0.2.