Abstract:
A Phase Lock Loop circuit (110) for providing a clock signal to an integrated IC chip. The PLL comprising a voltage tunable inductive-capacitive (LC) oscillator, a phase detector, a charge pump all coupled together to form a loop. A vco includes a varactor (150), inductor (130), and capacitances (160, 170, 180, 190, 185 and 195) forming the LC oscillator.
Abstract:
A crystal oscillation device with a temperature compensation function comprising: a constant voltage circuit (12) for outputting a predetermined voltage that does not depend on the ambient temperature; a temperature sensor circuit (13) for outputting a voltage proportional to the ambient temperature; and a control circuit (14) for generating a control voltage (Vc) which receives a constant voltage output of the constant voltage circuit (12) and a voltage output of the temperature sensor circuit (13) proportional to temperature and which performs polygonal line approximation, by using a continuous line, of a negative cubic curve for compensating for the temperature characteristic of a crystal oscillator over the entire range of the ambient temperature. The crystal oscillation device further includes a VCXO (15) whose oscillation frequency is controlled to a predetermined value by the control voltage (Vc), and a ROM/RAM circuit (16) where a temperature compensation parameter for compensating for the temperature characteristic of the control voltage (Vc) which is outputted by the control circuit (14) and used to optimize the oscillation frequency outputted by the VCXO (15) is stored.
Abstract:
A temperature compensation circuit (10) for a crystal oscillator module (12) used in a communication device (200). An existing microcontroller (210) of the communication device (200) is used to provide temperature compensating digital data (30) for a crystal oscillator (18). In this way, the crystal oscillator module (12) does not require an on-board memory which substantially cuts costs. The temperature compensation digital data (30) is converted to a temperature compensation signal (22) in a digital-to-analog converter which controls the crystal oscillator frequency. However, typical digital-to-analog converters are driven by voltage regulators which vary over temperature. To solve this problem, the crystal oscillator module (12) includes an on-board voltage regulator (34) which supplies a characterized regulated voltage (36) to the digital-to-analog converter such that the temperature compensation signal (22) from the digital-to-analog converter is inherently corrected for voltage variations in the voltage regulator (34). This improves stability of the output frequency (20) from about 5ppm to about 2ppm.
Abstract:
An oscillator which is easily fabricated in an integrated circuit and stably operates and the oscillatory frequency of which can be adjusted within a wide range. The oscillator is constituted of two phase shifting circuits (10C and 30C) which perform prescribed phase shifting by combining signals of the same phase and opposite phase generated at the source and drain of a FET through capacitors or resistors, a noninverting circuit (50) which amplifies the output signal of the phase shifting circuit (30C) of the second stage without changing its phase, and a feedback resistor (70) which feeds back the signal outputted from the circuit (50) to the input of the phase shifting circuit (10) of the first stage.
Abstract:
A radio frequency (RF) transceiver includes a direct modulation transmitter and single down-conversion receiver for operation in a time-division-duplex (TDD) telecommunications environment. A single RF signal source, in the form of a phase-lock-loop (PLL), is used on a time-shared basis to provide both the carrier signal for the transmitter and the local oscillator (LO) signal for the receiver. In the transmitter, direct modulation is effected by modulating a voltage-controlled oscillator (VCO) in the PLL with a burst of the transmit data while opening the loop and holding the loop feedback tuning voltage constant. In the receiver, a self-adjusting comparator threshold is provided for automatically setting and adjusting a demodulated signal comparison threshold used in retrieving the data and data clock from the demodulated receive signal. The interface between the transmitter and receiver and the host controller provides the control signals needed for the time-sharing of the single RF signal source, the proper programming of the PLL for the different transmitter carrier and receiver LO frequencies, the PLL loop control for the direct modulation of the VCO, and the enablement, or powering down, of the transmitter and receiver sections to minimize transceiver power consumption.
Abstract:
An improved frequency modulation apparatus (100) is provided comprising a generator (102), a biasing voltage line (116), and an interface circuit (110). The generator (102) is utilized to generate a carrier signal. A control line input (104) on the generator (102) adjusts the frequency of the carrier signal. The biasing voltage line (116) provides DC power in order to DC bias the generator (102). The interface circuit (110) couples an information signal (114) to the biasing voltage line (116) for altering the biasing of the generator (102) in response to the information signal (114). The alteration of the biasing of the generator (102) results in the carrier signal being frequency modulated by the information signal (114).
Abstract:
A local oscillation apparatus employing a dielectric coaxial resonator (27) which is used as a fixed local oscillation circuit for a tuner of the double super system and for a converter for CATV; wherein the center conductor of the dielectric coaxial resonator (27) is connected to an end of a variable-capacity diode (23) via a capacity (25), the other end of the diode being grounded in an AC manner, an AFC voltage being applied from an output terminal (E) of a frequency control circuit to the variable-capacity diode (23) via a resistor (35), and a first reference potential (VA) which is smaller than the power source voltage (VCC) by a predetermined potential drop being also applied thereto; wherein one end of the variable-capacity diode (23) is connected to the power source voltage (VCC) via a second resistor (22); and wherein even when the power source voltage (VCC) undergoes the change, the voltage does not change across both terminals of the variable-capacity diode (23) to prevent the oscillation frequency from changing.
Abstract:
A variable capacitance circuit includes a varactor (20) having an anode side (22) and a cathode side (21). A first variable bias voltage is applied to one of the sides (21 or 22) and one of a plurality of voltages is applied as a second bias voltage to the other side (21 or 22) for controlling the capacitance of the varactor (20). A voltage multiplier circuit connected to a voltage divider network is used for supplying the plurality of voltages. A decoder (81) is responsive to input signals for selecting and applying one of the multiple voltage outputs. The variable capacitance circuit is used in a voltage control oscillator (11) of a frequency synthesizer for providing extended frequency range.
Abstract:
An injection locking oscillator (ILO) comprising a tank circuit having a digitally controlled capacitor bank, a cross-coupled differential transistor pair coupled to the tank circuit, at least one signal injection node, and at least one output node configured to provide an injection locked output signal; a digitally controlled injection-ratio circuit having an injection output coupled to the at least one signal injection node, configured to accept an input signal and to generate an adjustable injection signal applied to the at least one injection node; and, an ILO controller connected to the capacitor bank and the injection-ratio circuit configured to apply a control signal to the capacitor bank to adjust a resonant frequency of the tank circuit and to apply a control signal to the injection-ratio circuit to adjust a signal injection ratio.