Abstract:
A calibration board and a timing calibration method thereof are provided. The calibration board for calibrating signal delays of test channels in an automatic test equipment is pluggably disposed in the automatic test equipment and includes calibration groups, a first common node, and a switching module. Each calibration group includes a second common node and conductive pads electrically connecting to the second common node. Each conductive pad selectively and electrically connects to one test channel. The switching module electrically connects to the first common node and each second common node. When a first delay calibration procedure is performed, the connection between the first common node and each second common node is disabled. When a second delay calibration procedure is performed, the connection between the first common node and each second common node is built.
Abstract:
An electronic device testing apparatus with a locking mechanism for locking a press head and a socket plate is provided. When an electronic device is to be tested, a lifting arm is lowered so that a contact portion is in contact with the electronic device, and a locking mechanism is actuated to detain the press head on the socket plate. A pressing force generating device exerts a pressing force onto the electronic device and the socket plate, and at least a portion of a reaction force can be directed back to the locking mechanism. The locking mechanism is adapted to detain the press head on the socket plate. When the pressing force generating device generates a predetermined pressing force to certainly establish electrical connection between the electronic device and the chip socket, the reaction force produced by the chip socket may be distributed over the locking mechanism.
Abstract:
A dual loop type temperature control module and an electronic device testing apparatus having the same are provided. The temperature control module comprises a first loop through which a first working fluid of a first temperature flows, a second loop through which a second working fluid of a second temperature flows, a controller for controlling a first switching valve such that the first or second working fluid flows through a temperature regulating device, and a second switching valve such that the working fluid flowing through the temperature regulating device returns to the first or second loop. The temperature regulating device adjusts a thermoelectric cooling device to reach two different reference temperatures based on the rise/fall of its temperature dependent on the working fluid. The thermoelectric cooling device regulates the temperature of the tested object under a wide range of temperature difference and with accuracy based on the reference temperatures to facilitate the detection of high/low temperature.
Abstract:
An inspection system for obtaining an adjusted light intensity image includes a light source, an image capturing device and a controller. A field of view of the image capturing device is adjusted within an illumination area of the light source. A plurality of light emitting units of the light source are turned on in sequence. The image capturing device captures a calibration image when each of the light emitting units is turned on to obtain a plurality of the calibration images. The controller adjusts the light emitting intensities of the light emitting units respectively according to the light intensity distributions of the calibration images to obtain a specific intensity distribution of an inspection image in the field of view and compensate a vignette effect of the image capturing device.
Abstract:
A clock generating device includes a first timing delay module, a multiplexer, and a second timing delay module. The multiplexer is electrically connected to the first timing delay module. The second timing delay module is electrically connected to the multiplexer. The first timing delay module generates a plurality of delayed clock signals based on a reference clock signal. The multiplexer outputs a first delayed clock signal and a second delayed clock signal, among the plurality of delayed clock signals, based on a clock generating signal. The second timing delay module generates an output clock signal based on the clock generating signal, the first delayed clock signal and the second delayed clock signal.
Abstract:
A test system with rotational test arms for testing semiconductor components includes a transport device, a first test socket, a second test socket, a first test arm, and a second test arm. The first test socket and the second test socket are electrically connected to different test signals respectively and correspond to the first test arm and the second test arm. The first test arm and the second test arm test arms operate rotationally to carry and place the semiconductor components to the transport device, the first test socket and the second test socket, so the test time is improved.
Abstract:
The disclosure discloses a heating furnace including a housing, a first rack, a chamber, and at least one fan. The first rack is disposed in the housing. The chamber is disposed in the housing and located at a side of the first rack. The chamber includes an inlet, a first sidewall, and a second sidewall. The first sidewall is adjacent to the first rack. The first sidewall has a plurality of vents. The first sidewall and the second sidewall are disposed to face each other. A width is spaced between the first sidewall and the second sidewall, and the width is larger than or equal to 200 mm. The fan is disposed in the housing for generating an airflow to the inlet.
Abstract:
An inspection system for obtaining an adjusted light intensity image includes a light source, an image capturing device and a controller. A field of view of the image capturing device is adjusted within an illumination area of the light source. A plurality of light emitting units of the light source are turned on in sequence. The image capturing device captures a calibration image when each of the light emitting units is turned on to obtain a plurality of the calibration images. The controller adjusts the light emitting intensities of the light emitting units respectively according to the light intensity distributions of the calibration images to obtain a specific intensity distribution of an inspection image in the field of view and compensate a vignette effect of the image capturing device.
Abstract:
A testing system for testing semiconductor package stacking chips is disclosed. The system includes a testing socket, a testing arm, and a testing mechanism. The testing mechanism includes a probe testing device. The probe testing device has a testing chip inside and a plurality of testing probes electrically connected to the testing chip. The plurality of testing probes extends toward the testing socket for contacting a chip-under-test loaded on the testing socket. When the testing mechanism moves to an upper position between the testing socket and the testing arm, the testing arm moves downward in the vertical direction and presses down the testing mechanism thereby coercing the plurality of testing probes in the testing mechanism to closely abut against the chip-under-test, so that the testing chip inside the testing mechanism can electrically connect to the chip-under-test for forming a test loop.
Abstract:
An automatic retest method for a system-level IC test equipment and the IC test equipment is disclosed, wherein the IC test equipment includes multiple testing units, a loading/unloading unit, and a processing unit; each testing unit is capable of testing an IC individually and has a pass rate. When the testing unit finishes a test operation, it will send test report of the IC to the processing unit. The processing unit will determine whether the IC has reached a pass threshold of the testing unit. The processing unit will issue a command, according to a predetermined rule, to transfer the IC that failed to reach the pass threshold to one of the testing units conforming to the predetermined rule to conduct a retest operation. Finally, the processing unit will confirm whether the IC that failed to reach the pass threshold has reached the pass threshold in the retest operation.