METHODS FOR TRANSMISSION AND RECEPTION OF A SERIAL SIGNAL AND CORRESPONDING DEVICES
    261.
    发明申请
    METHODS FOR TRANSMISSION AND RECEPTION OF A SERIAL SIGNAL AND CORRESPONDING DEVICES 有权
    传输和接收串行信号和相关设备的方法

    公开(公告)号:US20160072610A1

    公开(公告)日:2016-03-10

    申请号:US14836041

    申请日:2015-08-26

    CPC classification number: H04K1/00 G09C1/00 H04L9/0662

    Abstract: A device for transmitting a signal over a serial link includes a transmission processor to carry out, before transmission over the serial link, a scrambling process on successive initial packets of the signal to form a scrambled packet for each initial packet. The transmission processor includes an encoding circuit to carry out an encoding process on each initial packet to deliver an encoded packet. The encoding process includes, for each current initial packet starting from the second, encoding of the current initial packet with the preceding scrambled packet. Calculation circuitry determines, for each initial packet, a bit disparity of the encoded packet and determination of a cumulative bit disparity. Comparison circuitry carries out a comparison process involving the bit disparity of the encoded packet and the cumulative disparity, with the scrambled packet being the encoded packet or the inverted encoded packet, depending on the result of the comparison process.

    Abstract translation: 用于通过串行链路发送信号的装置包括发送处理器,用于在通过串行链路传输之前对该信号的连续初始分组进行加扰处理,以形成每个初始分组的加扰分组。 发送处理器包括编码电路,用于对每个初始分组执行编码处理以递送编码分组。 对于从当前起始分组开始的每个当前初始分组,编码处理包括具有先前加扰分组的当前初始分组的编码。 计算电路对于每个初始分组确定编码分组的比特差异和确定累积比特差异。 比较电路根据比较过程的结果进行涉及编码分组的比特差异和累积视差的比较处理,其中加扰分组是编码分组或反转编码分组。

    High performance class AB operational amplifier
    267.
    发明授权
    High performance class AB operational amplifier 有权
    高性能AB类运算放大器

    公开(公告)号:US09231540B2

    公开(公告)日:2016-01-05

    申请号:US14304589

    申请日:2014-06-13

    Abstract: A class AB operational amplifier includes an input stage, an output stage and a level shifter stage to control the quiescent current of the output stage and to transfer the signal from the input stage to the output stage, and a control circuit of the level shifter stage. The control circuit includes a transistor differential pair having a differential input terminals and the differential voltage at the differential terminals of the differential pair controls the level shifter stage.

    Abstract translation: AB类运算放大器包括输入级,输出级和电平移位级,以控制输出级的静态电流并将信号从输入级传送到输出级,以及电平转换级的控制电路 。 控制电路包括具有差分输入端的晶体管差分对,差分对的差分端的差分电压控制电平转换级。

    Method for localizing an object
    268.
    发明授权
    Method for localizing an object 有权
    本地化对象的方法

    公开(公告)号:US09182474B2

    公开(公告)日:2015-11-10

    申请号:US13768707

    申请日:2013-02-15

    CPC classification number: G01S5/14 G01S5/0221 G01S5/06 H04B1/707

    Abstract: A method for localizing an object, including the acts of: transmission of a first signal by a first transmitter assigned to the object and of a second signal by at least one second transmitter; reception of the first and of the second signal by at least three receivers; in each receiver and for the first and the second signal: a) generation of a first and of a second reference signal; b) correlation between the first signal and the first reference signal and between the second signal and the second reference signal; c) interpolation of samples resulting from the correlation; d) deduction of the propagation time of the first and of the second signal; e) calculation of the difference between the propagation times of the first and of the second signal; and, by triangulation, deduction of the position of the object.

    Abstract translation: 一种用于定位对象的方法,包括以下动作:由分配给对象的第一发射机传输第一信号,以及由至少一个第二发射机传输第二信号; 由至少三个接收器接收第一和第二信号; 在每个接收机中以及对于第一和第二信号:a)产生第一和第二参考信号; b)第一信号和第一参考信号之间以及第二信号和第二参考信号之间的相关; c)由相关产生的样本的插值; d)扣除第一和第二信号的传播时间; e)计算第一和第二信号的传播时间之差; 并通过三角测量来扣除物体的位置。

    TAG-BASED IMPLEMENTATIONS ENABLING HIGH SPEED DATA CAPTURE AND TRANSPARENT PRE-FETCH FROM A NOR FLASH
    269.
    发明申请
    TAG-BASED IMPLEMENTATIONS ENABLING HIGH SPEED DATA CAPTURE AND TRANSPARENT PRE-FETCH FROM A NOR FLASH 有权
    基于标签的实现,从NOR闪存启用高速数据捕获和透明预备

    公开(公告)号:US20150318049A1

    公开(公告)日:2015-11-05

    申请号:US14266010

    申请日:2014-04-30

    Abstract: Embodiments disclosed herein generally relate for efficiently retrieving boot code for a processor from serial NOR flash memory. When a boot code request is received, a request handler in data capture logic tags successive address read requests to indicate whether the requests indicate contiguous addresses in the NOR flash memory for the boot code. Different circuitry in the data capture logic operates on different mesochronous clock signals. One clock signal drives the capture of boot code from NOR flash, and the other controls synchronized tagging, storing, pre-fetching, and transmitting of the captured boot code data.

    Abstract translation: 本文公开的实施例通常涉及从串行NOR闪速存储器有效地检索处理器的引导代码。 当接收到引导代码请求时,数据捕获逻辑中的请求处理器标记连续的地址读取请求,以指示请求是否指示用于引导代码的NOR闪存中的连续地址。 数据采集​​逻辑中的不同电路在不同的同步时钟信号上运行。 一个时钟信号驱动从NOR闪存捕获引导代码,另一个控制器同步标记,存储,预取和发送捕获的引导代码数据。

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