Abstract:
Described herein is a resistor layer for use in field emission display devices and the like, and its method of manufacture. The resistor layer is an amorphous silicon layer doped with nitrogen and phosphorus. Nitrogen concentration in the resistor layer is preferably between about 5 and 15 atomic percent. The presence of nitrogen and phosphorus in the silicon prevents diffusion of Si atoms into metal conductive layers such as aluminum, even up to diffusion and packaging temperatures. The nitrogen and phosphorus also prevent defects from forming at the boundary between the resistor layer and metal conductor. This leads to better control over shorting and improved resistivity in the resistor.
Abstract:
An image formation apparatus is disclosed which includes, within an enclosure configured by a pair of substrates placed face to face and an external frame placed between the substrates, an electron source placed on one of the pair of substrates, an image formation material placed on the other substrate, and spacers placed between the substrates, characterized in that the spacers and the external frame is conductive and device is provided for electrically connecting the spacers and the external frame so that the equipotential surfaces between the spacers and the external frame are quasi-parallel when driven.
Abstract:
A thin film transistor structure for a field emission display is disclosed, which has a substrate; a patterned poly-silicon layer having a source area, a drain area, and a channel on the substrate; a patterned first gate metal layer; a first gate-insulating layer sandwiched in between the poly-silicon layer and the first gate metal layer; a patterned second gate metal layer; and a second gate-insulating layer sandwiched in between the poly-silicon layer and the second gate metal layer; wherein the thickness of the second insulating layer is greater than that of the first gate-insulating layer, and the absolute voltage in the channel under the first gate metal layer is less than that under the second gate metal layer when a voltage higher than the threshold voltage thereof is applied to both of the first gate metal layer and the second gate metal layer.
Abstract:
An enhanced Spindt-tip field emitter tip and a method for producing the enhanced Spindt-tip field emitter. A thin-film resistive heating element is positioned below the field emitter tip to allow for resistive heating of the tip in order to sharpen the tip and to remove adsorbed contaminants from the surface of the tip. Metal layers of the enhanced field emission device are separated by relatively thick dielectric bilayers, with the metal layers having increased thickness in the proximity of a cylindrical well in which the field emitter tip is deposited. Dielectric material is pulled back from the cylindrical aperture into which the field emitter tip is deposited in order to decrease buildup of conductive contaminants and the possibility of short circuits between metallic layers.
Abstract:
The invention includes field emitters, field emission displays (FEDs), monitors, computer systems and methods employing the same for providing uniform electron beams from cathodes of FED devices. The apparatuses each include electron beam uniformity circuitry. The electron beam uniformity circuit provides a grid voltage, VGrid, with a DC offset voltage sufficient to induce field emission from a cathode and a periodic signal superimposed on the DC offset voltage for varying the grid voltage at a frequency fast enough to be undetectable by the human eye. The cathodes may be of the micro-tipped or flat variety. The periodic signal may be sinusoidal with peak-to-peak voltage of between about 5 volts and about 50 volts.
Abstract:
Disclosed are flat panel field emitter displays whose unit cell structure adopt a planar cathode structure in stead of a conventional microtip structure, so as to increase the degree of integration and can be operated at low operation voltages at high speeds. In the structure, a channel insulator is formed below the cathode and underlaid by a gate. By means of the gate voltage, the electron emission from the cathode can be controlled. The electrodes in the structure are arranged in the order of anode, cathode and gate, allowing the simplification of processes. With the ease of controlling the distance between electrodes, the displays can be applied for almost all video systems from small sizes to large screen area displays, in place of conventional displays. The displays allows conventional semiconductor processes and facilities to be utilized as they are.
Abstract:
A field emitter cell includes a thin-film-edge emitter normal to the gate layer. The field emitter cell may include a conductive substrate layer, an insulator layer having a perforation, a gate layer having a perforation, an emitter layer, and other optional layers. The perforation in the gate layer is larger and concentrically offset with respect to the perforation in the insulating layer and may be of a tapered construction. Alternatively, the perforation in the gate layer may be coincident with, or larger or smaller than, the perforation in the insulating layer, provided that the gate layer is shielded from the emitter from a direct line-of-sight by a nonconducting standoff layer. Optionally, the thin-film-edge emitter may include incorporated nanofilaments. The field emitter cell has low gate current, making it useful for various applications such as field emitter displays, high voltage power switching, microwave, RF amplification and other applications that require high emission currents.
Abstract:
The present invention proposes a field emitting display, wherein a field emitting array is formed on a glass substrate. The field emitting array comprises a plurality of arrays of thin film transistors and a plurality of carbon nanotubes used as field emitting cathodes. The magnitude and stability of the field-emitted current of the carbon nanotubes are controlled by using the thin film transistors. The present invention has the characteristics of high quality, large area, and low cost.
Abstract:
Field emitter display (FED) assemblies and methods of forming field emitter display (FED) assemblies are described. In one embodiment, a substrate is provided having a column line formed and supported thereby. A plurality of field emitter tip regions are formed and disposed in operable proximity to the column line. At least some of the regions define different pixels of the display. A continuous resistor is interposed between the column line and at least two different pixels. In another embodiment, a column line is formed and supported by a substrate. A plurality of field emitter tip regions are formed and disposed in operable proximity to the column line. The regions define different pixels of the display. A single current-limiting resistor is operably coupled with the column line and at least two different pixels. In yet another embodiment, a series of column lines are formed over a substrate. A series of field emitter tip regions are formed and arranged into discrete pixels which are disposed in operable proximity to individual respective column lines. A series of resistor strips is formed and supported by the substrate. The resistor strips individually underlie respective individual series of field emitter tip regions. The individual resistor strips operably connect respective column lines and field emitter tip regions. At least one of the resistor strips operably connects its associated column line and at least two different discrete pixels. Other embodiments are described.
Abstract:
The present invention proposes a field emitting display, wherein a field emitting array is formed on a glass substrate. The field emitting array comprises a plurality of arrays of thin film transistors and a plurality of carbon nanotubes used as field emitting cathodes. The magnitude and stability of the field-emitted current of the carbon nanotubes are controlled by using the thin film transistors. The present invention has the characteristics of high quality, large area, and low cost.