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公开(公告)号:KR2019920008441U
公开(公告)日:1992-05-20
申请号:KR2019900015707
申请日:1990-10-15
Applicant: 삼성전자주식회사
IPC: H01L23/495
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公开(公告)号:KR102207923B1
公开(公告)日:2021-01-26
申请号:KR1020140010888
申请日:2014-01-28
Applicant: 삼성전자주식회사 , 성균관대학교산학협력단
IPC: C01B31/02
Abstract: 에피텍셜성장된다수의그래핀층으로이루어진다층그래핀구조체의형성방방법이개시된다. 개시된다층그래핀구조체의형성방법은, 성장용기판을준비하는단계와, 상기성장용기판상에희생층을형성하는단계와, 화학기상증착법에의해상기희생층상에그래핀을성장시키는단계와, 상기희생층의적어도일부가제거되고상기그래핀상에다른그래핀을성장시킴으로써상기성장용기판상에다수의그래핀층을형성하는단계를포함한다.
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公开(公告)号:KR1020150089840A
公开(公告)日:2015-08-05
申请号:KR1020140010888
申请日:2014-01-28
Applicant: 삼성전자주식회사 , 성균관대학교산학협력단
IPC: C01B31/02
CPC classification number: H01L21/02527 , H01L21/02425 , H01L21/02458 , H01L21/02505 , H01L21/0262 , H01L21/02664 , C01B32/188
Abstract: 에피텍셜성장된다수의그래핀층으로이루어진다층그래핀구조체의형성방방법이개시된다. 개시된다층그래핀구조체의형성방법은, 성장용기판을준비하는단계와, 상기성장용기판상에희생층을형성하는단계와, 화학기상증착법에의해상기희생층상에그래핀을성장시키는단계와, 상기희생층의적어도일부가제거되고상기그래핀상에다른그래핀을성장시킴으로써상기성장용기판상에다수의그래핀층을형성하는단계를포함한다.
Abstract translation: 公开了一种用多层石墨烯层形成的具有外延生长的多层石墨烯结构的方法。 形成多层石墨烯结构的方法包括以下步骤:制备用于生长的板; 在成长板上形成牺牲层; 通过化学气相沉积法在牺牲层上生长石墨烯; 以及通过在前述步骤中生长的石墨烯上生长其它石墨烯,通过消除牺牲层的至少一部分,在生长板上形成多个石墨烯层。
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公开(公告)号:KR1020150082065A
公开(公告)日:2015-07-15
申请号:KR1020140112110
申请日:2014-08-27
Applicant: 삼성전자주식회사
IPC: F25D23/02
CPC classification number: F25D23/028 , E06B7/18 , F25D11/02 , F25D23/02 , F25D2323/021 , E05Y2201/71 , E05Y2800/12 , E05Y2900/31 , F25D23/087
Abstract: 한쌍의도어중 회전바가설치되지않은도어의개폐시에도회전바가회전되어한 쌍의도어사이의이격된틈을밀폐시킬수 있도록하는냉장고를제공한다. 냉장고는제1도어와제2도어사이의틈을밀폐시키는회전바와, 회전바의회전을유도하는가이드장치를포함하며, 가이드장치는제2도어의개폐에따라전후방향으로직선운동되며내부에제2자석이내장되는래크, 래크와치합되어래크가직선운동될때 회전되는피니언기어및 가이드돌기를가이드하는가이드홈이마련되며피니언기어와치합되어피니언기어가회전될때 래크와반대방향으로직선운동하며회전바를회전시키는가이드유닛을포함하는것을특징으로한다.
Abstract translation: 提供一种当打开和关闭其中旋转杆未安装在一对门中的门时,旋转杆旋转时,密封一对门之间的分离间隙的冰箱。 冰箱包括:旋转杆密封第一门和第二门之间的间隙; 以及引导旋转杆旋转的引导装置。 引导装置包括:通过打开和关闭第二门,其中第二磁体嵌入其内,线性地向前和向后移动的齿条; 齿条与齿条配合,当机架线性移动时旋转; 和引导槽导向凸块; 以及引导单元,其具有引导凹槽,引导凸块与小齿轮啮合并且在小齿轮旋转时沿与齿条相反的方向线性移动,并且旋转旋转体。
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公开(公告)号:KR1020100003318A
公开(公告)日:2010-01-08
申请号:KR1020080059499
申请日:2008-06-24
Applicant: 삼성전자주식회사
Inventor: 송영재
CPC classification number: H01L2224/48091 , H01L2224/48247 , H01L2924/00014
Abstract: PURPOSE: An LED package is provided to the reflective efficiency of a light light-emitted from an LED chip by including a reflection member. CONSTITUTION: An LED package(100) comprises a package mold(110), a reflection member(120), and an LED chip(130). A package mold accepts a first and a second lead frame. The package mold has a space for molding material. The reflection member is arranged on the inner side of the package mold. The LED chip is arranged on the first lead frame, and the LED package more includes the Molding material(140) and the wire(145). Molding material is filed in the space and protects the LED chip. The wire electrically connects the LED chip and the reflection member.
Abstract translation: 目的:通过包括反射构件,提供LED封装以提供从LED芯片发出的光的反射效率。 构成:LED封装(100)包括封装模具(110),反射构件(120)和LED芯片(130)。 包装模具接受第一和第二引线框架。 包装模具具有用于模制材料的空间。 反射构件设置在封装模具的内侧。 LED芯片布置在第一引线框架上,并且LED封装件更包括成型材料(140)和导线(145)。 成型材料在该空间中存放并保护LED芯片。 导线将LED芯片与反射构件电连接。
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公开(公告)号:KR100533847B1
公开(公告)日:2005-12-07
申请号:KR1019990032515
申请日:1999-08-09
Applicant: 삼성전자주식회사
IPC: H01L21/58
CPC classification number: H01L2224/16225 , H01L2224/34 , H01L2224/48227 , H01L2924/15311 , H01L2924/181 , H01L2924/00012
Abstract: 본 발명은 캐리어 테이프(Carrier tape)를 이용한 적층형 플립 칩 패키지(Stacked flip chip package)에 관한 것으로, 더욱 구체적으로는 범프들이 형성된 반도체 칩들이 패키지 조립 레벨(Package assembly level)에서 플립 칩 본딩 기술을 이용하여 상하부에 적층될 수 있도록 형성된 캐리어 테이프를 이용하여 형성된 적층형 플립 칩 패키지의 구조를 개시하고, 이에 더하여 금속 박막의 상/하로 이방성 전도 필름 또는 개구부가 형성된 탄성중합체 필름 등이 접착되어 형성된 캐리어 테이프의 구조를 개시하며, 이러한 구조들을 통하여 적층형 플립 칩 패키지의 제조비용을 절감하고 제조공정을 단순화하여 단축함으로써 제조공정의 효율을 향상할 수 있으며, 이러한 구조를 통하여 적층형 플립 칩 패키지의 신뢰성을 향상할 수 있다.
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公开(公告)号:KR1020010068504A
公开(公告)日:2001-07-23
申请号:KR1020000000453
申请日:2000-01-06
Applicant: 삼성전자주식회사
IPC: H01L23/02
CPC classification number: H01L2224/48091 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00012
Abstract: PURPOSE: A multi-package and a stacked package using the same are provided to reduce a thickness of a package body by forming a multi-chip package. CONSTITUTION: A printed circuit board(152) is used generally as a substrate(152) of a multi-chip package(100). A via hole is formed on the printed circuit board(152). A circuit pattern(114) is formed on an upper portion and a lower portion of the printed circuit board(152). A conductive material is applied on an inner wall of the via hole in order to connect electrically the upper portion having the circuit pattern(114) with circuit faces(152b,152a) of the lower portion. A bonding pad(124) is located on a center portion or a peripheral portion of an active face(122) of the first semiconductor chip(120). A metal bump(126) is formed on the bonding pad(124). The active face(122) of the first semiconductor chip(120) is faced to the circuit face(152a) of the lower face. A metal bump(136) is formed on the second semiconductor chip(130). An active face(132) of the second semiconductor chip(130) is faced to the circuit face(152a) of the upper face. The metal bumps(126,136) are attached on the circuit pattern(114). A under-fill encapsulant(118) is formed between the first and the second semiconductor chips(120,130) and the printed circuit board(152). The multi-chip package(100) is connected with an outside by an outer connection terminal(116).
Abstract translation: 目的:提供使用其的多封装和堆叠封装,以通过形成多芯片封装来减小封装体的厚度。 构成:印刷电路板(152)通常用作多芯片封装(100)的基板(152)。 在印刷电路板(152)上形成通孔。 电路图案(114)形成在印刷电路板(152)的上部和下部。 导电材料被施加在通孔的内壁上,以便将具有电路图案(114)的上部与下部的电路面(152b,152a)电连接。 焊盘(124)位于第一半导体芯片(120)的有源面(122)的中心部分或周边部分上。 金属凸块(126)形成在焊盘(124)上。 第一半导体芯片(120)的有源面(122)面向下表面的电路面(152a)。 金属凸块(136)形成在第二半导体芯片(130)上。 第二半导体芯片(130)的有源面(132)面向上表面的电路面(152a)。 金属凸块(126,136)附接在电路图案(114)上。 在第一和第二半导体芯片(120,130)和印刷电路板(152)之间形成填充不足的密封剂(118)。 多芯片封装(100)通过外部连接端子(116)与外部连接。
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公开(公告)号:KR1020010026839A
公开(公告)日:2001-04-06
申请号:KR1019990038319
申请日:1999-09-09
Applicant: 삼성전자주식회사
IPC: H01L21/60
CPC classification number: H01L2224/32225 , H01L2224/4824 , H01L2224/73215 , H01L2924/00
Abstract: PURPOSE: A wire-bonded chip scale package is provided to improve yield of a reliability test after the chip scale package having center-pad type bonding pads is manufactured, by preventing a wire bonding defect and stress concentrated on solder balls. CONSTITUTION: A semiconductor chip(110) has a plurality of center-pad type bonding pads(112). A window(122) corresponding to the bonding pads is located in the center of a flexible board(120) which is adhered to an upper surface of the semiconductor chip by intervening adhesive. A metal interconnection(140) includes wire bonding parts(142) formed along both sides of the window and ball pads(144) connected to the wire bonding parts, formed on the flexible board. Bonding wires connect the bonding pads with the wire bonding parts. A pair of dams(162) are higher than the bonding wire, formed on the flexible board between the wire bonding parts and the ball pads. Molding resin(160) encapsulates an electrical connection part between the pair of dams. Solder balls(170) are formed on the ball pads. Stiffeners(180) of a metal material are formed in a lower portion of the flexible board along both sides of the window, corresponding to a region including the wire bonding parts.
Abstract translation: 目的:通过防止引线键合缺陷和应力集中在焊球上,提供了一种引线接合芯片级封装,以提高具有中心焊盘型焊盘的芯片级封装之后的可靠性测试的产量。 构成:半导体芯片(110)具有多个中心焊盘型焊盘(112)。 对应于接合焊盘的窗口(122)位于柔性板(120)的中心,柔性板通过介入粘合剂粘附到半导体芯片的上表面。 金属互连(140)包括沿着窗的两侧形成的导线接合部分(142)和连接到形成在柔性板上的引线接合部分的球垫(144)。 接合线将接合焊盘与引线接合部分连接。 一对堤坝(162)高于接合线,形成在引线接合部分和球垫之间的柔性板上。 成型树脂(160)封装在一对堤坝之间的电连接部分。 焊球(170)形成在球垫上。 对应于包括引线接合部分的区域,金属材料的加强件(180)形成在柔性板的沿着窗的两侧的下部。
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