Abstract:
전자 장치에 관한 것으로, 전자 장치는 콘텐츠를 출력하는 출력 모듈, 사용자 정보 또는 환경 정보 중 적어도 하나를 얻는 센싱 모듈 및 상기 콘텐츠의 속성에 따라 상기 사용자 정보 또는 상기 환경 정보 중 적어도 하나에 대응하여 상기 전자 장치의 동작을 제어하도록 구성된 프로세서를 포함할 수 있다.
Abstract:
PURPOSE: A power supply device performing a charge pumping motion is provided to continuously supply boosted electric charge to an output terminal by interlocking an output voltage and a gate voltage of a transistor and controlling the gate of the transistor. CONSTITUTION: Boosting circuit parts (30,30') boost voltages of a first boost node (BL) and a second boost node (BR) in response to a first main signal (Φ1) and a second main signal (Φ2), respectively. An output unit (10) comprises a first transmit part (50) that applies a voltage level of the first boost node to an output node and a second transmit part (50') that applies a voltage level of the second boost node to the output node. The output part outputs a boosting voltage through the output node. A bulk voltage control part (40) controls a connection between the output node and a bulk node according to a bulk control signal. A first control part (20) and a second control part (20') each respectively comprise capacitors (CL0,CR0) and NMOS transistors (ML0,MR0).
Abstract:
PURPOSE: An anti-fingerprinting coating composition is provided to prevent a fingerprint from staining a display part or a touch panel of an electronic product, and to have excellent durability. CONSTITUTION: An anti-fingerprinting coating composition comprises a silane oligomer. The silane oligomer comprises an R1 group represented by chemical formula 1: RaO-(CH2CH2O)p-Rb-, and an R2 group represented by chemical formula 2: (Rc)q. In the chemical formula 1, Ra is one or more selected from hydrogen, and a C1-3 alkyl group. Rb is one or more selected from a C5-20 alkyl, C5-20 alkenyl, C5-20 alkynyl, C5-20 aryl, C6-20 arylalkyl, C5-20 cyclic alkyl, or C5-20 hetero atom-containing alkyl group, and p is an integer from 1-12. In the chemical formula 2, Rc is a C3-20 cyclic alkyl group, and q is an integer from 1-3. [Reference numerals] (AA,BB,EE,FF) Light; (CC,GG) Coating film; (DD,HH) Base material
Abstract:
PURPOSE: A multimedia architecture pattern determining method and an apparatus and a method for converting from a single core-based architecture into a multi-core-based architecture are provided to construct architectures without background and accumulated knowledge with respect to a software architecture. CONSTITUTION: An inputting part(2310) receives a single-core based legacy source code. An extracting part(2320) extracts the functional and non-functional requirements of a software architecture based on the legacy source code. A first processing part(2330) considers the functional and non-functional requirements of the software architecture and generates the alternatives of the software architecture to determine the optimal architecture. A second processing part(2340) determines a component in response to the optimal architecture and instantiates the optimal architecture. The performance of a system with respect to the optimal architecture is quantitatively verified.
Abstract:
A digital camera with a view finder, an image displaying method in the view finder and a photographing method of the digital camera are provided to have a special effect unit and an optical viewfinder converting image light. A lens unit(10) is installed in the front of a body of a digital camera. The lens unit images image light of a subject. The lens unit comprises a plurality of optical lenses. A photoelectric converter(20) is arranged in a location where the image light is imaged. The photoelectric converter converts the imaged image into an electric signal. A viewfinder changes a path of the light passing the lens unit and provides the changed path to the user. The user monitors the subject while directly photographing an image through the viewfinder.
Abstract:
A semiconductor device having a guard ring with a PN diode is provided to discharge the charges accumulated by a charge-up phenomenon through an antenna diode in a chip region in an etch process using plasma while discharging the charges through a guard ring PN diode by forming a guard ring PN diode in a guard ring region. A semiconductor substrate with a chip region(CR1) and a guard ring region(GR1) surrounding the chip region is prepared. A p-well region(5) is disposed in the substrate in the chip region and the guard ring region. An n+ region(10b) is disposed on the p-well region in the guard ring region. A guard ring dam is formed on the substrate in the guard ring region and is electrically connected to the n+ region. The p-well region and the n+ region in the guard ring region constitute a guard ring PN diode(AD2). A gate is disposed on the substrate in the chip region. A first interlayer dielectric covers the gate. A direct contact penetrates the first interlayer dielectric. A bitline(30a) is disposed on the first interlayer dielectric and covers the direct contact. A second interlayer dielectric(35) covers the bitline. A metal contact(37a) penetrates the second interlayer dielectric. A first metal wiring(40a) is disposed on the second interlayer dielectric and covers the metal contact. A third interlayer dielectric(45) covers the first metal interconnection. A via contact(47a) penetrates the third interlayer dielectric. A second metal wiring(50a) is disposed on the third interlayer dielectric and covers the via contact.
Abstract:
A method for controlling a digital image processing apparatus, and an apparatus using the method are provided to search an image easily where the same object is synthesized in the same classification, so that a user can search a desired image. A method for controlling a digital image processing apparatus comprises the following steps of: inputting an object to the apparatus(301); granting ID(Identification) to the object and storing the object(302); displaying an image stored in the apparatus(303); loading the stored object(304); adding the ID of the loaded object to the image information about the displayed image(306); synthesizing the loaded object with the displayed image and displaying the synthesized image(307,308); and storing the synthesized and displayed image(309).
Abstract:
반도체 장치의 패드에서 바라본 입력 커패시턴스를 줄이기 위해 패드에 연결되는 액티브 저항의 개선된 레이아웃 구조가 개시된다. 그러한 액티브 저항의 레이아웃 구조는 P형 기판의 내부에 형성되어 전원 전압이 인가되는 N형 포켓 웰, 상기 N형 포켓 웰에 의해 상기 P형 기판과 분리되어 접지 전압보다 낮은 바이어스 전압이 인가되는 리버스 바이어스 영역, 상기 리버스 바이어스 영역의 상부에 상기 패드와 연결되는 N형 액티브 영역이 형성된다. 그리하여 본 발명은 P형 기판에 접지 전압보다 낮은 바이어스 전압을 인가하여 액티브 저항에서의 정션 커패시턴스를 감소시켜 패드에서 바라본 입력 캐패시턴스를 감소시키는 효과를 갖는다. 패드, 액티브 저항, 바이어스 전압