디지털 회로의 방사선 내성평가 시스템 및 방사선 내성평가 방법
    21.
    发明授权
    디지털 회로의 방사선 내성평가 시스템 및 방사선 내성평가 방법 有权
    数字集成电路中软错误抗扰度测试的方法与应用

    公开(公告)号:KR101697213B1

    公开(公告)日:2017-01-17

    申请号:KR1020150118985

    申请日:2015-08-24

    Abstract: 본발명은디지털회로의방사선내성평가시스템에관한것으로복수의논리회로와상기복수의논리회로에대응하여배치된복수의스캔플립플롭을포함하는검사대상회로; 소정시간방사선을발생시켜상기검사대상회로에조사하는방사선발생기; 상기검사대상회로및 상기방사선발생기와연결되어, 상기검사대상회로에방사선을조사하는제어신호를생성하여상기방사선발생기로전달하고, 상기검사대상회로의입출력을제어하는제어부를포함할수 있다.

    Abstract translation: 本发明的目的是检查辐射对数字集成电路的影响以及对软误差的容限。 一种用于估计数字电路的辐射容限的系统包括:检查对象电路,包括多个逻辑电路和与多个逻辑电路相对应设置的多个扫描触发器; 辐射发生器,其产生预定时间的辐射并将辐射照射到检查对象电路; 以及连接到检查对象电路和放射线发生器的控制单元,生成用于将辐射照射到检查对象电路的控制信号,将控制信号发送到放射线发生器,并且控制检查对象电路的输入/输出 。

    병렬 부호화를 위한 데이터 파티션 방법 및 이를 수행하는 프로그램을 기록한 기록매체
    22.
    发明公开
    병렬 부호화를 위한 데이터 파티션 방법 및 이를 수행하는 프로그램을 기록한 기록매체 有权
    用于并行编码的数据分割方法和具有执行其编程的记录介质的方法

    公开(公告)号:KR1020120040840A

    公开(公告)日:2012-04-30

    申请号:KR1020100102307

    申请日:2010-10-20

    Inventor: 김준태 김종태

    CPC classification number: H04N19/436 H04N19/176

    Abstract: PURPOSE: A data partitioning method for parallel encoding and a recording media with an execution program thereof are provided to dynamically select a macro block from processors following a predetermined priority. CONSTITUTION: When a fixed macro block which satisfies data dependency in a partitioned area exists, an encoding device determines whether the fixed macro block is included in k processor area(510,520). The encoding device determines whether the fixed macro block is included to a sharing area(540). The encoding device determines whether the fixed macro block is included in m processor area(550). The k processor processes the fixed macro block(530).

    Abstract translation: 目的:提供一种用于并行编码的数据划分方法和具有其执行程序的记录介质,以从预定优先级的处理器动态地选择宏块。 构成:当存在满足分割区域中的数据依赖性的固定宏块时,编码装置确定固定宏块是否包括在k处理器区域(510,520)中。 编码装置确定固定宏块是否包括在共享区(540)中。 编码装置确定固定宏块是否包括在m处理器区域(550)中。 k处理器处理固定宏块(530)。

    소프트 에러에 강한 시간적 티엠알 비터비 디코더 장치
    23.
    发明公开
    소프트 에러에 강한 시간적 티엠알 비터비 디코더 장치 失效
    TEMPORAL TMR VITERBI解码器装置软件错误

    公开(公告)号:KR1020110044541A

    公开(公告)日:2011-04-29

    申请号:KR1020090101270

    申请日:2009-10-23

    Inventor: 김종태 김호준

    CPC classification number: H03M13/4107 H03M13/6502 H03M13/6508 H04L1/22

    Abstract: PURPOSE: A temporal TMR viterbi decoder device robust against a soft error is provided to rewrite data in a memory which is used in an operation, thereby coping with a soft error which occurs in the memory. CONSTITUTION: A BMC block(10) obtains a branch matrix value shifted from a current state to a next state using a hamming distance determining method. An ACS block(20) obtains a determination vector value and a small state of a branch matrix value of the BMC block with the smallest value by using a path matrix of a next state memorized in a path matrix memory. A trace back block(30) decodes final data. A memory for storing path matrix data and a memory for storing determination vector data rewrite data in a path matrix memory(20b) and a determination vector memory(30a) of the track back block and the ACS block.

    Abstract translation: 目的:提供针对软错误鲁棒的时间TMR维特比解码器装置,以重写在操作中使用的存储器中的数据,从而应对存在于存储器中的软错误。 构成:BMC块(10)使用汉明距离确定方法获得从当前状态转移到下一状态的分支矩阵值。 ACS块(20)通过使用存储在路径矩阵存储器中的下一状态的路径矩阵来获得具有最小值的BMC块的分支矩阵值的确定向量值和小状态。 回溯块(30)解码最终数据。 一种用于存储路径矩阵数据的存储器和用于存储确定向量数据重写数据的存储器,用于将路径矩阵存储器(20b)和轨道返回块和ACS块的确定向量存储器(30a)存储。

    코딕 알고리듬을 사용한 파이프라인 구조의 디지털 전치 왜곡기 및 이의 신호 왜곡 방법
    24.
    发明公开
    코딕 알고리듬을 사용한 파이프라인 구조의 디지털 전치 왜곡기 및 이의 신호 왜곡 방법 失效
    使用CORDIC算法的管道结构的数字预测器及其信号失真的方法

    公开(公告)号:KR1020100037485A

    公开(公告)日:2010-04-09

    申请号:KR1020080096827

    申请日:2008-10-01

    CPC classification number: H03F1/3247 H03F1/3258 H03F1/3282

    Abstract: PURPOSE: A digital pre distorter and this signal distortion method of the pipeline of using the cord algorithm reduce the use area of the digital pre distorter by constituting the core unit and polynomial part with the form of pipeline. CONSTITUTION: A core unit(230) comprises a plurality of core blocks outputting the amplitude and phase of the digital signal. Core blocks are composed of the form of pipeline. A distorter(240) distorts the phase outputted in the core unit. Distorter comprises the register Block(240a) storing the coefficient of the inverse function of the polynomial part(240b) distorted and the signal inputted to the core unit to the amplitude inputted to the core unit and the value coping with phase with the inverse function according to the amplitude.

    Abstract translation: 目的:数字预失真器和使用绳索算法的信道失真方法通过以管道形式构成核心单元和多项式部分来减少数字预失真器的使用面积。 构成:核心单元(230)包括输出数字信号的幅度和相位的多个核心块。 核心块由管道的形式组成。 损坏器(240)扭曲在核心单元中输出的相位。 晶体管包括寄存器块(240a),其将失真的多项式部分(240b)的反函数的系数和输入到核心单元的信号存储到输入到核心单元的幅度和与逆函数相对应的值 到振幅。

    신호 무결성을 위한 차동 전송 선로 및 그 제조방법
    25.
    发明授权
    신호 무결성을 위한 차동 전송 선로 및 그 제조방법 失效
    用于信号完整性的差分线及其制造方法

    公开(公告)号:KR100755516B1

    公开(公告)日:2007-09-05

    申请号:KR1020060058107

    申请日:2006-06-27

    CPC classification number: H01P3/026 H01P1/02 H05K1/0237

    Abstract: A differential transmission line for signal integrity and a method for fabricating the same are provided to transmit a high speed signal stably by minimizing interference between signals and a noise by reversing a signal polarity in a transmission section. A differential transmission line comprises a substrate(3), a first differential signal line(1) and a via. The first differential signal line comprises a first signal line with a first crossing part and a first wiring part, and a second signal line with a second wiring part and a second crossing part. One end of the first wiring part and one end of the first crossing part are arranged in turn. One end of the second wiring part and one end of the second crossing part are arranged in turn. The via penetrates through the substrate, and connects the first wiring part and the first crossing part of the first signal line and the second wiring part and the second crossing part of the second signal line.

    Abstract translation: 提供一种用于信号完整性的差分传输线及其制造方法,用于通过使发送部分中的信号极性反转来最小化信号之间的干扰和噪声来稳定地发送高速信号。 差分传输线包括衬底(3),第一差分信号线(1)和通孔。 第一差分信号线包括具有第一交叉部分和第一布线部分的第一信号线以及具有第二布线部分和第二交叉部分的第二信号线。 第一布线部分的一端和第一交叉部分的一端依次布置。 第二配线部的一端和第二交叉部的一端依次配置。 通孔穿过衬底,并且连接第一信号线的第一布线部分和第一交叉部分以及第二信号线的第二布线部分和第二交叉部分。

    가시광을 이용한 실내 위치 인식 장치 및 방법

    公开(公告)号:KR101835967B1

    公开(公告)日:2018-03-08

    申请号:KR1020160054858

    申请日:2016-05-03

    Abstract: 가시광을이용한실내위치인식장치및 방법이제공된다. 실내위치인식방법은복수의발광다이오드 - 상기복수의발광다이오드에포함된각각의발광다이오드는, 각발광다이오드에따라서로상이한직교코드가적용된가시광신호를각각발생시키도록구성됨 - 로부터의가시광신호를수신하는단계와상기수신된가시광신호에상기상이한직교코드들을적용함으로써상기복수의발광다이오드중 적어도하나의발광다이오드를식별하는단계, 그리고상기식별된적어도하나의발광다이오드와측위지점사이의거리를기반으로상기측위지점의위치를결정하는단계를포함한다. 따라서, 대역폭의제한없이넓은장소에서사용할수 있고위치인식정확도를개선할수 있으며, SNR 를증가시켜신호의신뢰성을높일수 있다.

    터치스크린 장치
    27.
    发明授权
    터치스크린 장치 有权
    TOUCHSCREEN APPARATUS

    公开(公告)号:KR101665991B1

    公开(公告)日:2016-10-13

    申请号:KR1020150055492

    申请日:2015-04-20

    Abstract: 본발명의일 실시예에따른터치스크린장치는구동채널및 수신채널이소정패턴으로배치되며, 상기구동채널과수신채널사이에배치되는센싱신호를포함하는정전용량터치패널; 4배수하다마드코드를구도코드로선택하는구동신호를생성하여상기구동채널로인가하는구동신호부; 상기수신채널과연결되어상기구동신호에대한수신신호를센싱하는수신신호센싱부를포함하여, 터치신호의품질을향상시킬수 있다.

    터치 스크린의 노이즈 제거를 위한 터치스크린 장치 및 터치 판별 방법
    28.
    发明授权
    터치 스크린의 노이즈 제거를 위한 터치스크린 장치 및 터치 판별 방법 有权
    触摸屏设备和触摸感应方法,用于移除触摸屏的噪音

    公开(公告)号:KR101496183B1

    公开(公告)日:2015-02-27

    申请号:KR1020140009733

    申请日:2014-01-27

    CPC classification number: G06F3/044

    Abstract: Disclosed in the present invention is a touch screen device that distinguishes touches. The device includes a touch sensor panel in which a plurality of driving electrodes and a plurality of receiving electrodes are arranged in a certain pattern; a driving signal generation unit which generates a driving signal and applies the signal to the driving electrodes; and a receiving signal sensing unit which is connected to the receiving electrodes and senses a receiving signal corresponding to the driving signal. The driving signal generation unit generates a first driving signal for two frames consequent in a time domain and a first reverse signal which is reverse to the first driving signal alternately and applies the signal to the driving electrodes.

    Abstract translation: 在本发明中公开了一种区分触摸的触摸屏设备。 该装置包括触摸传感器面板,其中多个驱动电极和多个接收电极以一定的模式排列; 驱动信号生成单元,其生成驱动信号并将该信号施加到驱动电极; 以及接收信号感测单元,其连接到接收电极并感测对应于驱动信号的接收信号。 驱动信号生成单元交替地生成与时域相关的两帧的第一驱动信号和与第一驱动信号相反的第一反向信号,并将该信号施加到驱动电极。

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