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公开(公告)号:EP1573815A1
公开(公告)日:2005-09-14
申请号:EP03799897.8
申请日:2003-12-12
Applicant: FormFactor, Inc.
Inventor: KHANDROS, Igor, K. , ELDRIDGE, Benjamin, N. , MILLER, Charles, A. , SPORCK, A., Nicholas , GRUBE, Gary, W. , MATHIEU, Gaetan, L.
IPC: H01L25/065 , H01L23/538 , H01L23/498 , H01L23/495
CPC classification number: H01L23/13 , H01L23/4951 , H01L23/5386 , H01L23/5387 , H01L24/48 , H01L24/49 , H01L24/50 , H01L25/0655 , H01L2224/0401 , H01L2224/05554 , H01L2224/06136 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48137 , H01L2224/48139 , H01L2224/4824 , H01L2224/49 , H01L2224/73215 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/0105 , H01L2924/014 , H01L2924/10161 , H01L2924/14 , H01L2924/15192 , H01L2924/181 , H01L2924/19043 , H01L2924/19107 , H01L2924/3011 , H01L2924/3025 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2924/00
Abstract: In an integrated circuit assembly, know good die (KGD) are assembled on a substrate. Interconnect elements electrically connect pads on a die attached to the substrate to traces or other electrical conductors on the substrate or to pads on another die attached to the substrate. The substrate may have one or more openings, exposing pads of the die. The assembly may comprise one or more dice.
Abstract translation: 在集成电路组件中,将良好的裸芯(KGD)组装在基板上。 互连元件将附接到衬底的芯片上的焊盘电连接到衬底上的迹线或其他电导体或连接到衬底的另一裸片上的焊盘。 衬底可以具有一个或多个开口,暴露管芯的焊盘。 组件可以包括一个或多个骰子。
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公开(公告)号:EP1407280A1
公开(公告)日:2004-04-14
申请号:EP02742417.5
申请日:2002-07-10
Applicant: FORMFACTOR, INC.
Inventor: GRUBE, Gary, W. , KHANDROS, Igor, K. , ELDRIDGE, Benjamin, N. , MATHIEU, Gaetan, L. , LOTFIZADEH, Poya , TSENG, Chih-Chiang
IPC: G01R1/073
CPC classification number: G01R31/2886 , G01R1/07314 , G01R1/07342 , G01R1/07357 , G01R1/07378 , G01R3/00 , Y10T29/49126
Abstract: A method of designing and manufacturing a probe card assembly includes prefabricating one or more elements of the probe card assembly to one or more predefined designs. Thereafter, design data regarding a newly designed semiconductor device is received along with data describing the tester and testing algorithms to be used to test the semiconductor device. Using the received data, one or more of the prefabricated elements is selected. Again using the received data, one or more of the selected prefabricated elements is customized. The probe card assembly is then built using the selected and customized elements.
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