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    DEVICE FOR RECOVERING DATA FROM A RECEIVED DATA SIGNAL
    21.
    发明专利
    DEVICE FOR RECOVERING DATA FROM A RECEIVED DATA SIGNAL 未知

    公开(公告)号：AU2002325915A1

    公开(公告)日：2003-09-22

    申请号：AU2002325915

    申请日：2002-07-26

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ENGL BERNHARD ,  GREGORIUS PETER

    IPC: H03L7/089 ,  H03L7/091 ,  H04L7/033 ,  H04L25/04

    Abstract: A CDR circuit arrangement, for example for a transceiver module, features a data recovery unit ( 4 ) for the recovery of the data contained in a received signal (DATA) by scanning this received data signal, and a phase evaluation unit for the determination of a suitable phase position for the scanning carried out by the data recovery unit ( 4 ). The phase evaluation unit comprises a scanning device ( 1 ) for the oversampling of a the received data signal (DATA) in accordance with several different scanning phases (P 0 -P 6 ), a phase detector device ( 2 ) for the evaluation of the scanning values (A 0 -A 6 ) accordingly prepared by the scanning device ( 1 ), in order thereby to derive intermediate signals (UP 1 -UP 3, DN 1 -DN 3 ), which classify the phase error during the scanning of the data signal by the scanning device ( 1 ) in respect of its size and direction of deviation, as well as a filter device ( 3 ), in order to subject the intermediate signals (UP 1 -UP 3, DN 1 -DN 3 ) generated by the phase detector device ( 2 ) to a weighted filtering process. In this situation, a setting signal (DeltaP) is generated by the filter device ( 3 ) for the subsequent regulation and control of the scanning phases (P 0 -P 6 ) of the scanning device ( 1 ).

    22.
    发明专利
    未知

    公开(公告)号：DE10207315A1

    公开(公告)日：2003-09-18

    申请号：DE10207315

    申请日：2002-02-21

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ENGL BERNHARD ,  GREGORIUS PETER

    IPC: H03L7/089 ,  H03L7/091 ,  H04L7/033 ,  H04L25/04

    Abstract: A CDR circuit arrangement, for example for a transceiver module, features a data recovery unit ( 4 ) for the recovery of the data contained in a received signal (DATA) by scanning this received data signal, and a phase evaluation unit for the determination of a suitable phase position for the scanning carried out by the data recovery unit ( 4 ). The phase evaluation unit comprises a scanning device ( 1 ) for the oversampling of a the received data signal (DATA) in accordance with several different scanning phases (P 0 -P 6 ), a phase detector device ( 2 ) for the evaluation of the scanning values (A 0 -A 6 ) accordingly prepared by the scanning device ( 1 ), in order thereby to derive intermediate signals (UP 1 -UP 3, DN 1 -DN 3 ), which classify the phase error during the scanning of the data signal by the scanning device ( 1 ) in respect of its size and direction of deviation, as well as a filter device ( 3 ), in order to subject the intermediate signals (UP 1 -UP 3, DN 1 -DN 3 ) generated by the phase detector device ( 2 ) to a weighted filtering process. In this situation, a setting signal (DeltaP) is generated by the filter device ( 3 ) for the subsequent regulation and control of the scanning phases (P 0 -P 6 ) of the scanning device ( 1 ).

    23.
    发明专利
    未知

    公开(公告)号：DE10102443A1

    公开(公告)日：2002-08-01

    申请号：DE10102443

    申请日：2001-01-19

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ENGL BERNHARD

    IPC: G05F3/24 ,  H03F3/45 ,  H03F1/02

    Abstract: The invention relates to a current source circuit that is characterized in that it comprises a control device (T2', T11', T12', T6, IQ1, IQ2) which controls a component (T2) of the current source circuit which determines a variable of the current supplied by the current source circuit, and in that the component is controlled in accordance with the conditions that prevail in the unit that supplied by the current source circuit with current. The inventive circuit is thus capable of continuously supplying a constant current without any limitations to its applications.

    Apparatus for self calibration of folding analog to digital convertors
    24.
    发明专利
    Apparatus for self calibration of folding analog to digital convertors 未知

    公开(公告)号：DE10004996A1

    公开(公告)日：2001-08-09

    申请号：DE10004996

    申请日：2000-02-04

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ENGL BERNHARD

    IPC: G11C27/02 ,  H03F3/45 ,  H03M1/10 ,  H03M1/36 ,  H03M1/06

    Abstract: A folding stage of the convertor has means for sensitizing, inhibiting and enabling signal paths through the convertor such that in a first operating condition, first and second inputs to the stage are switched through to corresponding inputs of a differential amplifier (3) of the respective stage. In a second operating condition a low auxiliary potential is applied to the first input and a high auxiliary potential is applied to the second input. In a third condition a high auxiliary potential is applied to the first input and a low auxiliary potential is applied to the second input. In a fourth condition both inputs are set to a potential between the high and low potentials. Means (13) are also provided to set the amplifier outputs to the same potential in dependence on signals on a control bus (18). Means are also provided feed a signal from a comparator or differential amplifier via an interrogation bus (19) to a control unit (20). Independent claims also cover a self calibration method.

    METHOD FOR CONTROLLING THE SAMPLING PHASE
    28.
    发明专利
    METHOD FOR CONTROLLING THE SAMPLING PHASE 未知

    公开(公告)号：CA2440101C

    公开(公告)日：2006-03-21

    申请号：CA2440101

    申请日：2002-09-06

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： GREGORIUS PETER ,  ENGL BERNHARD

    IPC: H04L7/02 ,  H04L7/033

    Abstract: Method for sampling phase control for the clock and data recovery of a data signal having the following steps, namely sampling (S1) of the received data signal with a first sampling signal comprising equidistant sampling pulses, minimization (S2, S3) of the phase deviation between the first sampling signal and the phase of the received data signal for the purpose of generating an adjusted second sampling signal, sampling (S4) of the received data signal with the second adjusted sampling signal for the purpose of generating sampling data values, integration (S5) of the sampling data values of the sampled data signal to form a summation value, and alteration (S9) of the phase of sampling pulses of the adjusted second sampling signal until the integrated summation value exceeds a threshold value (SW) that can be set.

    METHOD FOR CONTROLLING THE SAMPLING PHASE
    30.
    发明专利
    METHOD FOR CONTROLLING THE SAMPLING PHASE 未知

    公开(公告)号：CA2440101A1

    公开(公告)日：2003-08-07

    申请号：CA2440101

    申请日：2002-09-06

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： GREGORIUS PETER ,  ENGL BERNHARD

    IPC: H04L7/02 ,  H04L7/033

    Abstract: Disclosed is a method for controlling the sampling phase in order to recover the tact pulse and data of a data signal, comprising the following steps: - the received data signal is sampled (S1) by a first sampling signal which consists of equidistant sampling pulses; - the phase variation between the first sampling signal and the phase of the received data signal is minimized (S2, S3) in order to generate an adjusted second sampling signal; - the received data signal is sampled (S4) by the second adjusted sampling signal in order to generate sampling data values; - the sampled data values of the sampled data signal are integrated (S5) to a cumulative value; and - the pha se of sampling pulses of the adjusted second sampling signal is modified until the integrated cumulative value exceeds a variable threshold value (SW).

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