公开(公告)号：DE112011105905T5

公开(公告)日：2014-09-11

申请号：DE112011105905

申请日：2011-12-02

Applicant: INTEL CORP

Inventor： VOGT PETE ,  SHOEMAKER KENNETH

IPC: H01L27/10 ,  H01L21/8242 ,  H01L27/108

Abstract: Gestapelter Speicher, der Veränderlichkeit bei Gerätzusammenschaltungen erlaubt. Eine Ausführungsform eines Speichergeräts weist ein Systemelement für das Speichergerät auf, wobei das Systemelement mehrere Pads enthält, und einen Speicherstapel, der mit dem Systemelement verbunden ist, wobei der Speicherstapel eine oder mehrere Speicherchipschichten hat, eine Verbindung des Systemelements und des Speicherstapels, die Zusammenschaltungen zum Verbinden einer ersten Speicherchipschicht und der Mehrzahl von Pads des Systemelements enthält. Für eine Einzelspeicherchipschicht in dem Speicherstapel wird ein erster Untersatz der Mehrzahl von Pads für eine erste Gruppe von Zusammenschaltungen für die Verbindung des Systemelements und des Speicherstapels verwendet, und für zwei oder mehr Speicherchipschichten werden der erste Untersatz und ein zusätzlicher zweiter Untersatz der Mehrzahl von Pads für die erste Gruppe von Zusammenschaltungen und eine zweite Gruppe von Zusammenschaltungen für die Verbindung des Systemelements und des Speicherstapels verwendet.

公开(公告)号：GB2441082B

公开(公告)日：2011-01-19

申请号：GB0722948

申请日：2006-06-22

Applicant: INTEL CORP

Inventor： VOGT PETE

IPC: G11C7/20 ,  G11C11/4072

Abstract: A memory device may determine its device ID in response to the order of a received training pattern. The training pattern may be transmitted over swizzled signal lines to multiple memory devices arranged in a logical stack. Each memory device may be packaged on a substrate having the swizzled signal lines. The memory devices may be physically stacked or planar. Other embodiments are described and claimed.

公开(公告)号：GB2438528B

公开(公告)日：2010-10-27

申请号：GB0712810

申请日：2005-12-29

Applicant: INTEL CORP

Inventor： VOGT PETE

IPC: H01L23/31 ,  H01L23/36 ,  H01L23/498 ,  H01L25/065

Abstract: An embedded heat spreader includes a semiconductor die, an elastomer layer attached to the die, a tape lead attached to the elastomer, a portion of the tape lead exposed through the elastomer to connect with the die, a polymer resin attached to the tape lead, and a thermally conductive substrate attached to the polymer resin such that the thermally conductive substrate can spread heat from the semiconductor die.

公开(公告)号：AT428163T

公开(公告)日：2009-04-15

申请号：AT04810426

申请日：2004-11-05

Applicant: INTEL CORP

Inventor： HALBERT JOHN ,  FREEMAN CHRIS ,  WILLIAMS MICHAEL ,  BAINS KILJIT ,  ELLIS ROBERT ,  VOGT PETE

IPC: G09F13/16 ,  G06F13/16

Abstract: Method and apparatus for use with buffered memory modules are included among the embodiments. In exemplary systems, the memory module has a buffer that receives memory commands and data, and then presents those commands and data to physical memory devices through a separate interface. The buffer has the capability to accept an implicit memory command, i.e., a command that does not contain a fully-formed memory device command, but instead instructs the memory module buffer to form one or more fully-formed memory device commands to perform memory operations. Substantial memory channel bandwidth can be saved, for instance, with a command that instructs a memory module to clear a region of memory or copy a region to a second area in memory. Other embodiments are described and claimed.

公开(公告)号：AT412941T

公开(公告)日：2008-11-15

申请号：AT04752912

申请日：2004-05-20

Applicant: INTEL CORP

Inventor： VOGT PETE ,  ALEXANDER JAMES

IPC: G06F13/42

Abstract: Memory apparatus and methods utilize permuting status patterns. A memory agent may include a pattern generator capable of generating permuting status patterns. A system may include first and second memory agents that send data and permuting status patterns over the same link.

公开(公告)号：DE602004008067T2

公开(公告)日：2007-11-22

申请号：DE602004008067

申请日：2004-05-20

Applicant: INTEL CORP

Inventor： VOGT PETE

IPC: G06F13/42

Abstract: A memory agent may include a first port and a second port, wherein the memory agent is capable of detecting the presence of another memory agent on the second port. A method may include performing a presence detect operation on a first port of a memory agent, and reporting the results of the presence detect operation through a second port of the memory agent.

公开(公告)号：GB2438541B

公开(公告)日：2010-03-03

申请号：GB0714819

申请日：2006-03-31

Applicant: INTEL CORP

Inventor： VOGT PETE

IPC: G06F11/10

Abstract: An apparatus includes a source for a command and an associated data. An error code generator generates an error code for the combined command and associated data, which is distributed among the command and the associated data. A transmitter then transmits the command and the associated data separately.

公开(公告)号：GB2441082A

公开(公告)日：2008-02-20

申请号：GB0722948

申请日：2006-06-22

Applicant: INTEL CORP

Inventor： VOGT PETE

IPC: G11C7/20 ,  G11C11/4072

Abstract: A memory device may (44, 46) determine its device ID in response to the order of a received training pattern. The training pattern may be transmitted over swizzled signal lines to multiple memory devices (44, 46) arranged in a logical stack. Each memory device may be packaged on a substrate (48, 50) having the swizzled signal lines. The memory devices may be physically stacked or planar. Other embodiments are described and claimed.

公开(公告)号：GB2438541A

公开(公告)日：2007-11-28

申请号：GB0714819

申请日：2006-03-31

Applicant: INTEL CORP

Inventor： VOGT PETE

IPC: G06F11/10

Abstract: An apparatus includes a source for a command and an associated data. An error code generator generates an error code for the combined command and associated data, which is distributed among the command and the associated data. A transmitter then transmits the command and the associated data separately.

公开(公告)号：AT369589T

公开(公告)日：2007-08-15

申请号：AT04752906

申请日：2004-05-20

Applicant: INTEL CORP

Inventor： VOGT PETE

IPC: G06F13/42

Abstract: A memory agent may include a first port and a second port, wherein the memory agent is capable of detecting the presence of another memory agent on the second port. A method may include performing a presence detect operation on a first port of a memory agent, and reporting the results of the presence detect operation through a second port of the memory agent.