公开(公告)号：FR2627315A1

公开(公告)日：1989-08-18

申请号：FR8815691

申请日：1988-11-30

Applicant: INTEL CORP

Inventor： KREIFELS JERRY A ,  BAKER ALAN ,  HOEKSTRA GEORGE ,  KYNETT VIRGIL NILES ,  WELLS STEVEN ,  WINSTON MARK

IPC: G06F12/00 ,  G11C16/02 ,  G11C17/00 ,  G11C16/10 ,  G11C16/16 ,  G11C16/34 ,  G11C29/00 ,  G11C29/14

Abstract: A semiconductor flash EPROM/EEPROM device which includes a command port for receiving instruction on a data line and providing control signals to a memory for providing program and erase functions, a method to program and erase the memory. A program sequence is comprised of setting up a program command during a first write cycle, preforming a second write cycle to load address to address register and data to to a data register, programming during a program cycle and writing a program verify command during a third write cycle to verify the programmed data during a read cycle. An erase sequence is comprised of writing a setup erase command during a first write cycle, an erase command during a second write cycle providing the erasure during an erase cycle, writing the erase verify command during a third write cycle which also addresses the address of the memory and providing erase verification during a read cycle. Both the erase and program cycles provide for measured incremental erasing and programming.