公开(公告)号：US20230031911A1

公开(公告)日：2023-02-02

申请号：US17386912

申请日：2021-07-28

Applicant: INTEL CORPORATION

Inventor： Tamir Salus ,  Christopher Schaef ,  Alexander Lyakhov

IPC: G05F1/56

Abstract: A microelectronic assembly is disclosed, comprising a first integrated circuit (IC) die having electrical load circuits, first control circuits, and a second control circuit, a second IC die having powertrain (PTR) phase circuits electrically coupled to the first IC die, and inductors in a package substrate electrically coupled to the first IC die and the second IC die within a package. Individual ones of the first control circuits regulates power to a corresponding one of the electrical load circuits. The second control circuit maps the first control circuits and the PTR phase circuits. The PTR phase circuits control power to the inductors. The first control circuits, the second control circuit, the PTR phase circuits and the inductors together function as a voltage regulator configured to receive power from the package substrate at a first voltage and deliver power to the electrical load circuits at a second voltage.

公开(公告)号：US20220060180A1

公开(公告)日：2022-02-24

申请号：US17517573

申请日：2021-11-02

Applicant: Intel Corporation

Inventor： Juan Munoz Constantine ,  Christopher Schaef ,  Ajay Janardanan ,  Alexander Lyakhov

IPC: H03K4/08 ,  H03K3/017

Abstract: Embodiments herein relate to a circuit which generates a sawtooth waveform based on an adaptive feedback loop that self-corrects the ramp up rate to account for variations in a device. The sawtooth waveform is obtained by repeatedly charging and discharging a capacitor according to a clock signal. The sawtooth waveform can be sampled once per clock period at a comparator which provides a corresponding binary output to a state machine. If the binary output indicates the amplitude of the sawtooth waveform is below a desired maximum voltage, the state machine outputs a code word to a digitally-controlled variable current source to increase the output current. The sawtooth waveform can be used to provide a pulse-width modulated (PWM) waveform such as for a DC-DC converter.

公开(公告)号：US20200220457A1

公开(公告)日：2020-07-09

申请号：US16820555

申请日：2020-03-16

Applicant: Intel Corporation

Inventor： Lilly Huang ,  Christopher Schaef ,  Vaibhav Vaidya ,  Suhwan Kim

IPC: H02M3/07 ,  H02M3/158 ,  H02J7/34

Abstract: Apparatuses, methods and storage medium associated with deriving power output from an energy harvester are disclosed herein. In embodiments, an apparatus may include one or more processors, devices, and/or circuitry to identify a plurality of times at which an intermediate voltage of a two stage power conversion circuit corresponds to a voltage reference, and ascertain an amount of time between one of the identified times and another one of the identified times. The one or more processors, devices, and/or circuitry may derive a power or current value associated with the second power supply using the amount of time.

公开(公告)号：US10530254B2

公开(公告)日：2020-01-07

申请号：US15632086

申请日：2017-06-23

Applicant: INTEL CORPORATION

Inventor： Khondker Ahmed ,  Vivek De ,  Nachiket Desai ,  Suhwan Kim ,  Harish Krishnamurthy ,  Xiaosen Liu ,  Turbo Majumder ,  Krishnan Ravichandran ,  Christopher Schaef ,  Vaibhav Vaidya ,  Sriram Vangal

IPC: H02M3/158 ,  H02M1/08 ,  H02M1/00

Abstract: Embodiments described herein concern operating a peak-delivered-power (PDP) controller. Operating a PDP includes calculating the new power output value from the output voltage value and the output current value, determining whether the new power output value is greater than the previous power output value to determine whether the voltage regulator is outputting a maximum power output, based on a determination that the new power output value is greater than the previous power output value, providing an instruction to a duty generator to increase a duty cycle of the voltage regulator, based on a determination that the new power output value is not greater than the previous power output value, providing an instruction to the duty generator to decrease the duty cycle of the voltage regulator, and replacing the previous power output value with the new power output value.

公开(公告)号：US10379592B2

公开(公告)日：2019-08-13

申请号：US15462257

申请日：2017-03-17

Applicant: INTEL CORPORATION

Inventor： Dileep Kurian ,  Tanay Karnik ,  David Arditti Ilitzky ,  Ankit Gupta ,  Sriram Kabisthalam Muthukumar ,  Vaibhav Vaidya ,  Suhwan Kim ,  Christopher Schaef ,  Ilya Klochkov

IPC: G06F9/00 ,  G06F1/3212 ,  G06F1/3287 ,  G06F1/329

Abstract: The present disclosure provides for the management of power of a NZE IoT device. Managing power can include receiving the one or more asynchronous events from the asynchronous event system, determining if any of the one or more asynchronous events meet a respective charge qualification, generating the power-on command for the power-managed compute system if any of the one or more asynchronous events meet the respective charge qualification, and waiting for a power source to reach a threshold associated with the respective charge qualification if any of the one or more asynchronous events do not meet the respective charge qualification.

公开(公告)号：US20170271873A1

公开(公告)日：2017-09-21

申请号：US15076444

申请日：2016-03-21

Applicant: Intel Corporation

Inventor： Lilly Huang ,  Christopher Schaef ,  Vaibhav Vaidya ,  Suhwan Kim

IPC: H02J3/38 ,  H02M3/07

CPC classification number: H02M3/07 ,  H02J7/34 ,  H02M3/1582 ,  H02M2001/007

Abstract: Apparatuses, methods and storage medium associated with deriving power output from an energy harvester are disclosed herein. In embodiments, an apparatus may include one or more processors, devices, and/or circuitry to identify a plurality of times at which an intermediate voltage of a two stage power conversion circuit corresponds to a voltage reference, and ascertain an amount of time between one of the identified times and another one of the identified times. The one or more processors, devices, and/or circuitry may derive a power or current value associated with the second power supply using the amount of time.

公开(公告)号：US20230195200A1

公开(公告)日：2023-06-22

申请号：US17832423

申请日：2022-06-03

Applicant: Intel Corporation

Inventor： Vikram B. Suresh ,  Sanu K. Mathew ,  Christopher Schaef ,  Chandra S. Katta ,  Long Sheng ,  Chin S. Park ,  Srinivasan Rajagopalan ,  Raju Rakha

IPC: G06F1/324 ,  H03K5/01 ,  H03L7/08

CPC classification number: G06F1/324 ,  H03K5/01 ,  H03L7/08 ,  H03K2005/00019

Abstract: Embodiments herein relate to optimizing the operation of multiple integrated circuits (ICs) operating in parallel. In one aspect, the ICs are arranged in a voltage-stacked configuration, and an operating frequency of each IC is controlled using a tunable replica circuit to stabilize its voltage drop. The tunable replica circuit mimics a critical path on the IC. In another aspect, an IC is divided into top and bottom portions which are in respective voltage domains on a substrate. The substrate include a deep n-well region for the higher voltage domain. In another aspect, a physically unclonable function (PUF) is used to generate identifiers for each IC among a multiple ICs on a board. Entropy sources of the PUF generate bits of the identifiers. Unstable entropy sources are identified and their bits are masked out.

公开(公告)号：US20220069810A1

公开(公告)日：2022-03-03

申请号：US17006726

申请日：2020-08-28

Applicant: Intel Corporation

Inventor： Nachiket Desai ,  Suhwan Kim ,  Harish Krishnamurthy ,  Christopher Schaef

IPC: H03K3/037 ,  H03K5/24 ,  H03K17/687

Abstract: A digital self-start controller, which is functional without fuse and/or trim information. The self-start controller protects a DC-DC converter against large inrush currents and voltage overshoots, while being capable of following a variable VID (voltage identification) reference ramp imposed by the system. The self-start controller uses a relaxation oscillator to set the switching frequency of the DC-DC converter. The oscillator can be initialized using either a clock or current reference to be close to a desired operating frequency. The output of the DC-DC converter is coupled weakly to the oscillator to set the duty cycle for closed loop operation. The controller is naturally biased such that the output supply voltage is always slightly higher than a set point, eliminating the need for any process, voltage, and/or temperature (PVT) imposed trims.

公开(公告)号：US10958163B2

公开(公告)日：2021-03-23

申请号：US16820555

申请日：2020-03-16

Applicant: Intel Corporation

Inventor： Lilly Huang ,  Christopher Schaef ,  Vaibhav Vaidya ,  Suhwan Kim

IPC: H02M3/07 ,  H02M3/158 ,  H02J7/34 ,  H02M1/00

Abstract: Apparatuses, methods and storage medium associated with deriving power output from an energy harvester are disclosed herein. In embodiments, an apparatus may include one or more processors, devices, and/or circuitry to identify a plurality of times at which an intermediate voltage of a two stage power conversion circuit corresponds to a voltage reference, and ascertain an amount of time between one of the identified times and another one of the identified times. The one or more processors, devices, and/or circuitry may derive a power or current value associated with the second power supply using the amount of time.

公开(公告)号：US10958079B2

公开(公告)日：2021-03-23

申请号：US15939120

申请日：2018-03-28

Applicant: Intel Corporation

Inventor： Xiaosen Liu ,  Khondker Z. Ahmed ,  Vivek K. De ,  Nachiket V. Desai ,  Suhwan Kim ,  Harish K. Krishnamurthy ,  Turbo Majumder ,  Krishnan Ravichandran ,  Christopher Schaef ,  Vaibhav A. Vaidya ,  Sriram R. Vangal

IPC: H02J1/00 ,  H02J3/00 ,  H02J3/38 ,  H02M3/156 ,  G05F1/67 ,  H02M1/10 ,  H02M3/07 ,  H02M1/00

Abstract: In one embodiment, an energy harvesting system includes multiple-input-multiple-output switched-capacitor (MIMOSC) circuitry comprising a plurality of switched-capacitor circuit units to receive a plurality of direct current (DC) input voltages at respective input terminals of the switched-capacitor circuit unit, combine the received DC input voltages, and provide the combined DC input voltages at an output terminal of the switched-capacitor circuit unit. The energy harvesting system also includes maximum power point tracking (MPPT) circuitry coupled to switches of the switched-capacitor circuit units of the MIMOSC circuitry. The MPPT circuitry is to provide a plurality of switching signals to the switches of the switched-capacitor circuit units. The MIMOSC circuitry is to provide a plurality of DC output voltages to respective loads based on the switching signals from the MPPT circuitry.