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21.
公开(公告)号:US10382344B2
公开(公告)日:2019-08-13
申请号:US15645955
申请日:2017-07-10
Applicant: Intel Corporation
Inventor: Iosif Gasparakis , Mark D. Gray
IPC: H04L12/851 , H04L12/26 , H04L29/06
Abstract: An embodiment may include circuitry to be included, at least in part, in at least one node in a network. The circuitry may generate, at least in part, and/or receive, at least in part, at least one packet. The packet may be received, at least in part, by at least one switch node in the network. The switch node may designate, in response at least in part to the packet, at least one port of the switch node to be used to facilitate, at least in part, establishment, at least in part, of at least one path for propagation of at least one flow between at least two other nodes in the network. The packet may be generated based at least in part upon (1) at least one application classification, (2) at least one allocation request, and (3) network resource availability information.
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公开(公告)号:US10200292B2
公开(公告)日:2019-02-05
申请号:US14467917
申请日:2014-08-25
Applicant: Intel Corporation
Inventor: Iosif Gasparakis , Brian P. Johnson , Patrick G. Kutch
IPC: G06F15/173 , H04L12/801 , H04L12/24 , H04L29/08 , G06F9/48
Abstract: Technologies for aligning network flows to processing resources include a computing device having multiple processing nodes, a network switch, and a network controller operating in a software-defined network. Each processing node of the computing device may include a processor, memory, and network adapter. The network switch may receive a network packet and request forwarding information from the network controller. The network controller may determine flow information corresponding to the network packet that indicates the application targeted by the network packet and the processing node executing the application. The flow information may be transmitted to the computing device, which may program a flow filter in the network adapter of the processing node executing the application. The network controller may also transmit forwarding information to the network switch, which may forward the received network packet to the network adapter of the processing node executing the application based on the forwarding information.
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公开(公告)号:US10178054B2
公开(公告)日:2019-01-08
申请号:US15088910
申请日:2016-04-01
Applicant: INTEL CORPORATION
Inventor: Stephen T. Palermo , Iosif Gasparakis , Scott P. Dubal , Kapil Sood , Trevor Cooper , Jr-Shian Tsai , Jesse C. Brandeburg , Andrew J. Herdrich , Edwin Verplanke
IPC: H04L12/861 , H04L12/715 , H04L12/931 , G06F15/173
Abstract: Methods and apparatus for accelerating VM-to-VM Network Traffic using CPU cache. A virtual queue manager (VQM) manages data that is to be kept in VM-VM shared data buffers in CPU cache. The VQM stores a list of VM-VM allow entries identifying data transfers between VMs that may use VM-VM cache “fast-path” forwarding. Packets are sent from VMs to the VQM for forwarding to destination VMs. Indicia in the packets (e.g., in a tag or header) is inspected to determine whether a packet is to be forwarded via a VM-VM cache fast path or be forwarded via a virtual switch. The VQM determines the VM data already in the CPU cache domain while concurrently coordinating with the data to and from the external shared memory, and also ensures data coherency between data kept in cache and that which is kept in shared memory.
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公开(公告)号:US20180337850A1
公开(公告)日:2018-11-22
申请号:US15845107
申请日:2017-12-18
Applicant: Intel Corporation
Inventor: Nrupal Jani , Dinesh Kumar , Christian Maciocco , Ren Wang , Neerav Parikh , John Fastabend , Iosif Gasparakis , David J. Harriman , Patrick L. Connor , Sanjeev Jain
IPC: H04L12/721 , H04L12/911 , H04L12/803 , H04L12/725 , H04L12/26
CPC classification number: H04L45/44 , H04L43/026 , H04L43/0817 , H04L43/0876 , H04L43/16 , H04L45/306 , H04L47/125 , H04L47/781
Abstract: Devices and techniques for hardware accelerated packet processing are described herein. A device can communicate with one or more hardware switches. The device can detect characteristics of a plurality of packet streams. The device may distribute the plurality of packet streams between the one or more hardware switches and software data plane components based on the detected characteristics of the plurality of packet streams, such that at least one packet stream is designated to be processed by the one or more hardware switches. Other embodiments are also described.
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公开(公告)号:US20180278683A1
公开(公告)日:2018-09-27
申请号:US15465254
申请日:2017-03-21
Applicant: Intel Corporation
Inventor: Praveen Mala , Iosif Gasparakis
IPC: H04L29/08 , H04L29/06 , H04L12/935 , H04L12/933 , H04L12/707
CPC classification number: H04L67/1095
Abstract: Generally discussed herein are systems, devices, and methods for data distribution in a distributed data processing system (DDPS). A device of a distributed data processing system may include a storage device to store data regarding data nodes (DNs), switches, and racks on which the DNs and at least some of the switches reside, and circuitry to receive, from a name node or a client node of the DDPS and coupled to the device, a first communication indicating one or more DNs to which a portion of a file is to be replicated, determine a component in a data path between the client node and one or more of the DNs at which to mirror the portion of the file, and provide a second communication indicating the component at which the data is to be mirrored, one or more of the DNs to receive the portion of the tile, and the corresponding one or more of the racks on which the DNs reside.
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公开(公告)号:US09742632B2
公开(公告)日:2017-08-22
申请号:US14142275
申请日:2013-12-27
Applicant: Intel Corporation
Inventor: Iosif Gasparakis
Abstract: One embodiment provides a network interface controller. The network interface controller includes a portion of a hybrid software-defined networking (“SDN”) controller, the portion of the hybrid SDN controller including a service abstraction layer module (“SAL”) and a southbound application programming interface (“SB API”), the SAL including a representation of a physical network.
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公开(公告)号:US20240430160A1
公开(公告)日:2024-12-26
申请号:US18828979
申请日:2024-09-09
Applicant: Intel Corporation
Inventor: Iosif Gasparakis , Ronen Chayat , John Fastabend
IPC: H04L41/082 , H04L67/00 , H04L67/04
Abstract: A compute node coupled to a computer network via a computing device that includes communications for communicating with the computer network and persistent instructions for providing control functions to the computing device, wherein the control functions are defined by protocol data. An update control module of the computing device may receive update data from a remote node in the computer network via the communications, wherein the update data includes new protocol data for the persistent instructions. A protocol parser module may parse the update data and generate metadata relating to the update data. A classifier module may receive rules for the control functions, wherein the rules are based at least in part on the update data and metadata. A compiler may compile the parsed update data to the persistent instructions for providing new control functions to the computing device based at least in part on the received rules.
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公开(公告)号:US11888710B2
公开(公告)日:2024-01-30
申请号:US16140938
申请日:2018-09-25
Applicant: Intel Corporation
Inventor: Iosif Gasparakis , Malini Bhandaru , Ranganath Sunku
IPC: H04L41/5003 , G06F12/084 , G06F9/455 , H04L43/08 , H04L47/70 , G06F12/0864 , H04L67/568
CPC classification number: H04L41/5003 , G06F9/45558 , G06F12/084 , G06F12/0864 , H04L43/08 , H04L47/82 , H04L67/568 , G06F2009/4557 , G06F2009/45583 , G06F2009/45595 , G06F2212/1024 , G06F2212/154 , G06F2212/6032
Abstract: Technologies for managing cache quality of service (QoS) include a compute node that includes a network interface controller (NIC) configured to identify a total amount of available shared cache ways of a last level cache (LLC) of the compute node and identify a destination address for each of a plurality of virtual machines (VMs) managed by the compute node. The NIC is further configured to calculate a recommended amount of cache ways for each workload type associated with VMs based on network traffic to be received by the NIC and processed by each of the VMs, wherein the recommended amount of cache ways includes a recommended amount of hardware I/O LLC cache ways and a recommended amount of isolated LLC cache ways usable to update a cache QoS register that includes the recommended amount of cache ways for each workload type. Other embodiments are described herein.
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公开(公告)号:US20200084093A1
公开(公告)日:2020-03-12
申请号:US16687271
申请日:2019-11-18
Applicant: Intel Corporation
Inventor: Iosif Gasparakis , Ronen Chayat , John Fastabend
Abstract: Technologies for controlling operation of a compute node coupled to a computer network via a computing device that includes communications for communicating with the computer network and persistent instructions such as firmware for providing control functions to the computing device, wherein the control functions being defined at least in part by protocol data. An update control module of the computing device may receive update data from a remote node in the computer network via the communications, wherein the update data comprising new protocol data for the persistent instructions. A protocol parser module may parse the update data and generate metadata relating to the update data. A classifier module may receive rules for the control functions, wherein the rules are based at least in part on the update data and metadata. A compiler may compile the parsed update data to the persistent instructions for providing new control functions to the computing device based at least in part on the received rules.
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公开(公告)号:US20190394086A1
公开(公告)日:2019-12-26
申请号:US16519873
申请日:2019-07-23
Applicant: Intel Corporation
Inventor: Iosif Gasparakis , Ronen Chayat , John Fastabend
Abstract: Technologies for controlling operation of a compute node coupled to a computer network via a computing device that includes communications for communicating with the computer network and persistent instructions such as firmware for providing control functions to the computing device, wherein the control functions being defined at least in part by protocol data. An update control module of the computing device may receive update data from a remote node in the computer network via the communications, wherein the update data comprising new protocol data for the persistent instructions. A protocol parser module may parse the update data and generate metadata relating to the update data. A classifier module may receive rules for the control functions, wherein the rules are based at least in part on the update data and metadata. A compiler may compile the parsed update data to the persistent instructions for providing new control functions to the computing device based at least in part on the received rules.
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