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公开(公告)号:US20180337850A1
公开(公告)日:2018-11-22
申请号:US15845107
申请日:2017-12-18
Applicant: Intel Corporation
Inventor: Nrupal Jani , Dinesh Kumar , Christian Maciocco , Ren Wang , Neerav Parikh , John Fastabend , Iosif Gasparakis , David J. Harriman , Patrick L. Connor , Sanjeev Jain
IPC: H04L12/721 , H04L12/911 , H04L12/803 , H04L12/725 , H04L12/26
CPC classification number: H04L45/44 , H04L43/026 , H04L43/0817 , H04L43/0876 , H04L43/16 , H04L45/306 , H04L47/125 , H04L47/781
Abstract: Devices and techniques for hardware accelerated packet processing are described herein. A device can communicate with one or more hardware switches. The device can detect characteristics of a plurality of packet streams. The device may distribute the plurality of packet streams between the one or more hardware switches and software data plane components based on the detected characteristics of the plurality of packet streams, such that at least one packet stream is designated to be processed by the one or more hardware switches. Other embodiments are also described.
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公开(公告)号:US11489789B2
公开(公告)日:2022-11-01
申请号:US16023783
申请日:2018-06-29
Applicant: Intel Corporation
Inventor: Carl Geoffrion , Robert Southworth , Charles Atkin , Sanjeev Jain
IPC: H04L12/28 , H04L49/253 , H04L47/52 , H04L47/62 , H04L49/20
Abstract: Technologies for adaptive network packet egress scheduling include a switch configured to configure an eligibility table for a plurality of ports of the switch, wherein the eligibility table includes a plurality of rounds. The switch is further configured to retrieve an eligible mask corresponding to a round of a plurality of rounds of the eligibility table presently being scheduled and determine a ready mask that indicates a ready status of each port. The switch is further configured to determine, for each port, whether the eligible status and the ready status indicate that port is both eligible and ready, and schedule, in response to a determination that at least one port has been determined to be both eligible and ready, each of the at least one port that has been determined to be both eligible and ready. Additional embodiments are described herein.
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3.
公开(公告)号:US11082515B2
公开(公告)日:2021-08-03
申请号:US14866891
申请日:2015-09-26
Applicant: Intel Corporation
Inventor: Dinesh Kumar , Nrupal R. Jani , Ren Wang , Christian Maciocco , Sanjeev Jain
IPC: H04L29/08 , H04L12/825 , H04L12/931 , H04L12/725
Abstract: Technologies for offloading data object replication and service function chain management include a switch communicatively coupled to one or more computing nodes capable of executing virtual machines and storing data objects. The switch is configured to determine metadata of a service function chain, transmit a network packet to a service function of the service function chain being executed by one or more of the computing nodes for processing the network packet. The switch is further configured to receive feedback from service function, update the metadata based on the feedback, and transmit the network packet to a next service function of the service function chain. Additionally or alternatively, the switch is configured to identify a plurality of computing nodes (i.e., storage nodes) at which to store a received data object, replicate the data object based on the number of storage nodes, and transmit each of the received data object and replicated data object(s) to different corresponding storage nodes. Other embodiments are described and claimed.
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公开(公告)号:US09742616B2
公开(公告)日:2017-08-22
申请号:US14580766
申请日:2014-12-23
Applicant: Intel Corporation
Inventor: Nrupal Jani , Ilango Ganga , Daniel Daly , John Fastabend , Neerav Parikh , Elizabeth Kappler , Brian J. Skerry , Calin Gherghe , Sanjeev Jain , Ben-Zion Friedman
IPC: H04L29/06 , H04L12/54 , H04L12/931 , G06F9/455
CPC classification number: H04L29/0653 , G06F9/45558 , G06F2009/45595 , H04L12/56 , H04L49/70 , H04L69/22
Abstract: Devices and techniques for indicating packet processing hints are described herein. A device may receive a data packet. The device may extract a match-action attribute from the data packet that specifies an action to be applied to the data packet. The device may generate a hint field based on the match-action attribute. The hint field may include information to be used for handling the data packet. Other embodiments are also described.
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公开(公告)号:US20170149926A1
公开(公告)日:2017-05-25
申请号:US15426718
申请日:2017-02-07
Applicant: Intel Corporation
Inventor: Ren Wang , Sameh Gobriel , Christian Maciocco , Tsung-Yuan C. Tai , Ben-Zion Friedman , Hang T. Nguyen , Namakkal N. Venkatesan , Michael A. O'Hanlon , Shrikant M. Shah , Sanjeev Jain
IPC: H04L29/08 , H04L12/743 , H04L12/721 , H04L12/24 , H04L12/741
CPC classification number: H04L67/2852 , H04L41/0893 , H04L45/38 , H04L45/745 , H04L45/7453 , H04L49/00
Abstract: Technologies for identifying a cache line of a network packet for eviction from an on-processor cache of a network device communicatively coupled to a network controller. The network device is configured to determine whether a cache line of the cache corresponding to the network packet is to be evicted from the cache based on a determination that the network packet is not needed subsequent to processing the network packet, and provide an indication that the cache line is to be evicted from the cache based on an eviction policy received from the network controller.
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公开(公告)号:US20200159654A1
公开(公告)日:2020-05-21
申请号:US16751406
申请日:2020-01-24
Applicant: Intel Corporation
Inventor: Sanjeev Jain , Karl S. Papadantonakis , Robert G. Southworth , Alain Gravel , Jonathan A. Dama
Abstract: Apparatuses and methods for pipelined hashing are described herein. An example apparatus to perform a pipelined hash function may include a first memory to store a first plurality of bucket records, a second memory to store a second plurality of bucket records, and a hash circuit to receive a key and to perform a pipelined hash function using the key to provide a hash value. The hash circuit further to select a first bucket record of the first plurality of bucket records from the first memory based on a first subset of bits of the hash value. The hash circuit further to provide a location of a particular entry of an entry record of the plurality of entry records based on contents of the first bucket record and a second subset of bits of the hash value.
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公开(公告)号:US20200007470A1
公开(公告)日:2020-01-02
申请号:US16023783
申请日:2018-06-29
Applicant: Intel Corporation
Inventor: Carl Geoffrion , Robert Southworth , Charles Atkin , Sanjeev Jain
IPC: H04L12/937 , H04L12/931 , H04L12/863 , H04L12/873
Abstract: Technologies for adaptive network packet egress scheduling include a switch configured to configure an eligibility table for a plurality of ports of the switch, wherein the eligibility table includes a plurality of rounds. The switch is further configured to retrieve an eligible mask corresponding to a round of a plurality of rounds of the eligibility table presently being scheduled and determine a ready mask that indicates a ready status of each port. The switch is further configured to determine, for each port, whether the eligible status and the ready status indicate that port is both eligible and ready, and schedule, in response to a determination that at least one port has been determined to be both eligible and ready, each of the at least one port that has been determined to be both eligible and ready. Additional embodiments are described herein.
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公开(公告)号:US09992299B2
公开(公告)日:2018-06-05
申请号:US15426718
申请日:2017-02-07
Applicant: Intel Corporation
Inventor: Ren Wang , Sameh Gobriel , Christian Maciocco , Tsung-Yuan C. Tai , Ben-Zion Friedman , Hang T. Nguyen , Namakkal N. Venkatesan , Michael A. O'Hanlon , Shrikant M. Shah , Sanjeev Jain
IPC: H04L29/08 , H04L12/24 , H04L12/741 , H04L12/721 , H04L12/743
CPC classification number: H04L67/2852 , H04L41/0893 , H04L45/38 , H04L45/745 , H04L45/7453 , H04L49/00
Abstract: Technologies for identifying a cache line of a network packet for eviction from an on-processor cache of a network device communicatively coupled to a network controller. The network device is configured to determine whether a cache line of the cache corresponding to the network packet is to be evicted from the cache based on a determination that the network packet is not needed subsequent to processing the network packet, and provide an indication that the cache line is to be evicted from the cache based on an eviction policy received from the network controller.
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公开(公告)号:US09866498B2
公开(公告)日:2018-01-09
申请号:US14580792
申请日:2014-12-23
Applicant: Intel Corporation
Inventor: Ren Wang , Sameh Gobriel , Christian Maciocco , Tsung-Yuan C. Tai , Ben-Zion Friedman , Hang T. Nguyen , Namakkal N. Venkatesan , Michael A. O'Hanlon , Shrikant M. Shah , Sanjeev Jain
IPC: H04L12/757 , H04L29/08 , H04L12/931 , H04L12/741
CPC classification number: H04L67/2852 , H04L41/0893 , H04L45/38 , H04L45/745 , H04L45/7453 , H04L49/00
Abstract: Technologies for identifying a cache line of a network packet for eviction from an on-processor cache of a network device communicatively coupled to a network controller. The network device is configured to determine whether a cache line of the cache corresponding to the network packet is to be evicted from the cache based on a determination that the network packet is not needed subsequent to processing the network packet, and provide an indication that the cache line is to be evicted from the cache based on an eviction policy received from the network controller.
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公开(公告)号:US09794263B2
公开(公告)日:2017-10-17
申请号:US14583638
申请日:2014-12-27
Applicant: Intel Corporation
Inventor: Sanjeev Jain , Ronen Chayat
IPC: G06F15/16 , H04L29/06 , H04L12/741
CPC classification number: H04L63/101 , H04L45/74 , H04L63/20 , H04L69/22
Abstract: Technologies for performing access control include a computing device that parses a network packet received by the computing device to identify an n-tuple of a header of the network packet, wherein the n-tuple is associated with one or more access control rules. The computing devices determines a bitmask associated with an access control rule of a virtual machine of the computing device and applies the determined bitmask to the n-tuple of the network packet to generate a masked n-tuple. Further, the computing device generates a hash of the masked n-tuple and compares the generated hash to a reference hash associated with the access control rule to identify a match. The computing device performs an access control action in response to identifying a match between the generated hash and the reference hash.
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