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Patent Agency Ranking
公开(公告)号：DK175639B1
公开(公告)日：2005-01-03
申请号：DKPA200400536
申请日：2004-04-02
Applicant: INTERDIGITAL TECH CORP
Inventor： CRITCHLOW DAVID N , GRAHAM AVIS M , EARLAM SANDRA J K , JOHNSON KARLE J , SMETANA BRUCE A , WESTLING GREGORY L
Abstract: A base-band processor provides control of conversion of PCM signals at one bit rate to other bit rates. It converts received digital signals to voice signals and vice versa. It also provides echo cancellation where it uses dynamic memory to store received signals. PROM's store the echo cancellation program information as well as that for utilisation of the processor as a control processor. As a control processor it signals to the frequency synthesiser the frequency of operation for communication to the base station. The processor is directly coupled to a modem processor which is able to access the base band processor memory. This processor sends its signal at a predetermined sampling rate which are converted to analogue signals. The analogue signals are subjected to a cancellation process to reduce distortion. These signals are converted to an IF for addition to the synthesiser frequency to result in an HF signal for transmission.
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公开(公告)号：SE0401973L
公开(公告)日：2004-08-03
申请号：SE0401973
申请日：2004-08-03
Applicant: INTERDIGITAL TECH CORP
Inventor： CRITCHLOW DAVID N , EARLAM SANDRA J K , SMETANA BRUCE A
IPC: H04B7/26 , H03D3/00 , H03D7/16 , H03H17/06 , H03L7/095 , H04B1/38 , H04B1/50 , H04B7/005 , H04L27/152 , H04L27/18 , H04L27/22 , H04L27/233 , H04M1/00 , H04M1/253 , H04M1/725 , H04M11/06 , H04Q7/20 , H04Q7/38 , H04L27/06 , H04M1/03 , H04Q7/32
Abstract: A subscriber unit for a wireless digital telephone system is disclosed. An equalizer for receiving I and Q samples is disclosed which is in the form. The I and Q samples are complex sample pairs provided at a frequency. The equalizer receives a training signal in the form of complex I and Q sample pairs. A training signal is affected by undesirable characteristics that might be present in the I and Q samples. A comparator compares the actual input training signal with the desired output to obtain a set of weighting coefficients for the equalizer to produce the desired output. A frequency correction circuit provides a corrected frequency signal for the frequency of the sample pairs from the weighting coefficients.
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公开(公告)号：SE523252C2
公开(公告)日：2004-04-06
申请号：SE9902040
申请日：1999-06-03
Applicant: INTERDIGITAL TECH CORP
Inventor： CRITCHCLOW DAVID N , AVIS GRAHAM M , EARLAM SANDRA J K , JOHNSON KARLE J , SMETANA BRUCE A , WESTLING GREGORY L
IPC: H04B7/26 , H03D3/00 , H03D7/16 , H03H17/06 , H03L7/095 , H04B1/38 , H04B1/50 , H04B7/005 , H04L27/152 , H04L27/18 , H04L27/22 , H04L27/233 , H04M1/00 , H04M1/253 , H04M1/725 , H04M11/06 , H04Q7/20 , H04Q7/38 , H04Q7/32 , H04M1/03
Abstract: A subscriber unit for a wireless digital telephone system is disclosed. An equalizer for receiving I and Q samples is disclosed which is in the form. The I and Q samples are complex sample pairs provided at a frequency. The equalizer receives a training signal in the form of complex I and Q sample pairs. A training signal is affected by undesirable characteristics that might be present in the I and Q samples. A comparator compares the actual input training signal with the desired output to obtain a set of weighting coefficients for the equalizer to produce the desired output. A frequency correction circuit provides a corrected frequency signal for the frequency of the sample pairs from the weighting coefficients.
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公开(公告)号：DK200400536A
公开(公告)日：2004-04-02
申请号：DKPA200400536
申请日：2004-04-02
Applicant: INTERDIGITAL TECH CORP
Inventor： CRITCHLOW DAVID N , GRAHAM AVIS M , EARLAM SANDRA J K , JOHNSON KARLE J , SMETANA BRUCE A , WESTLING GREGORY L
Abstract: A base-band processor provides control of conversion of PCM signals at one bit rate to other bit rates. It converts received digital signals to voice signals and vice versa. It also provides echo cancellation where it uses dynamic memory to store received signals. PROM's store the echo cancellation program information as well as that for utilisation of the processor as a control processor. - As a control processor it signals to the frequency synthesiser the frequency of operation for communication to the base station. The processor is directly coupled to a modem processor which is able to access the base band processor memory. This processor sends its signal at a predetermined sampling rate which are converted to analogue signals. The analogue signals are subjected to a cancellation process to reduce distortion. These signals are converted to an IF for addition to the synthesiser frequency to result in an HF signal for transmission.
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公开(公告)号：IE67265B1
公开(公告)日：1996-03-06
申请号：IE383891
申请日：1986-11-18
Applicant: INTERDIGITAL TECH CORP
Inventor： CRTICHLOW DAVID N , AVIS GRAHAM M , EARLAM SANDRA J K , JOHNSON KARLE J , SMETANA BRUCE A , WESTLING GREGORY L
IPC: H04J20060101 , H04J3/12 , H04L20060101 , H04L27/00 , H04L27/20 , H04Q7/00
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