公开(公告)号：US20200373235A1

公开(公告)日：2020-11-26

申请号：US16419374

申请日：2019-05-22

Applicant: Intel Corporation

Inventor： Andrew COLLINS ,  Sujit SHARAN ,  Jianyong XIE

IPC: H01L23/522 ,  H01L23/48 ,  H01L25/00 ,  H01L25/065 ,  H01L21/768

Abstract: Embodiments herein relate to systems, apparatuses, or processes for an interconnect hub for dies that includes a first side and a second side opposite the first side to couple with three or more dies, where the second side includes a plurality of electrical couplings to electrically couple at least one of the three or more dies to another of the three or more dies to facilitate data transfer between at least a subset of the three or more dies. The three or more dies may be tiled dies.

公开(公告)号：US20200235053A1

公开(公告)日：2020-07-23

申请号：US16634864

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Kemal AYGUN ,  Zhiguo QIAN ,  Jianyong XIE

IPC: H01L23/538 ,  H01L21/48

Abstract: Methods/structures of joining package structures are described. Those methods/structures may include a die disposed on a surface of a substrate, an interconnect bridge embedded in the substrate, and at least one vertical interconnect structure disposed through a portion of the interconnect bridge, wherein the at least one vertical interconnect structure is electrically and physically coupled to the die.