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公开(公告)号:US11656247B2
公开(公告)日:2023-05-23
申请号:US16473378
申请日:2017-03-31
Applicant: Intel Corporation
Inventor: Ronald Michael Kirby , Erkan Acar , Joe Walczyk , Youngseok Oh , Justin M Huttula , Mohanraj Prabhugoud
CPC classification number: G01R1/07357 , G01R1/0466
Abstract: A coaxial wire interconnect architecture and associated methods are described. In one example, the coaxial wire interconnect architecture is used in a test socket interconnect array. Flexible bends are formed in one or more of the coaxial wire interconnects to provide compliant connections to an electronic device during testing.
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公开(公告)号:US20210345519A1
公开(公告)日:2021-11-04
申请号:US17359405
申请日:2021-06-25
Applicant: Intel Corporation
Inventor: Wenbin Tian , Yingqiong Bu , Yanbing Sun , Yang Yao , Yuehong Fan , Ming Zhang , Casey Robert Winkel , Jin Yang , David Shia , Mohanraj Prabhugoud
IPC: H05K7/20 , H01L23/367 , H01L23/427 , H01L23/40
Abstract: Techniques for reconfigurable heat sinks are disclosed. In one embodiment, a compute system includes a heat sink includes a core fin assembly with two removable lateral fin assemblies. The lateral fin assemblies may be above one or more components of the compute system, such as one or more memory modules. With the lateral fin assemblies in place, the cooling capacity of the heat sink is increased, but the more memory modules may be difficult or impossible to service. With the lateral fin assemblies removed, the memory modules can be serviced (e.g., replaced). In another embodiment, a lateral fin assembly of a heat sink is attached to a heat pipe. The lateral fin assembly can rotate relative to the heat pipe, allowing the lateral fin assembly to fit within a 2U form factor in one configuration and allow access to components under the lateral fin assembly in another configuration.
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公开(公告)号:US20190302857A1
公开(公告)日:2019-10-03
申请号:US15942280
申请日:2018-03-30
Applicant: INTEL CORPORATION
Inventor: Eric W. Buddrius , Ralph V. Miele , Mohanraj Prabhugoud , David Shia , Jeffory L. Smalley
Abstract: A microprocessor loading mechanism, comprising a bolster plate surrounding an aperture, wherein the opening is to receive a microprocessor socket, one or more torsion bars coupled to the bolster plate, and a stud coupled to each of the one or more torsion bars, wherein each stud is to receive a nut to secure a microprocessor package to the microprocessor socket within the aperture and wherein each stud is secured to the bolster plate by each corresponding torsion bar.
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公开(公告)号:US20160178663A1
公开(公告)日:2016-06-23
申请号:US14581508
申请日:2014-12-23
Applicant: INTEL CORPORATION
Inventor: Mohanraj Prabhugoud , Youngseok Oh , Joseph F. Walczyk , Todd P. Albertson
CPC classification number: G01R1/07357 , G01R1/0466 , G01R1/0483
Abstract: A test die contactor is described with a formed wire probe interconnect. In one example the contactor includes a plurality of wire probes formed to be resilient against longitudinal pressure, a first aligner proximate one end of the wire probes having a first plurality of holes through which the wire probes extend, the first alignment layer to align the wire probes to contact pads of a text fixture, a second aligner proximate the other end of the wire probes having a second plurality of holes through the wire probes extend, the second alignment layer to align the wire probes to contact pads of a device under test, and an insulating layer between the first and the second aligner through which the wire probes extend to hold the wire probes when compressed by longitudinal pressure.
Abstract translation: 使用形成的导线探针互连来描述测试模具接触器。 在一个示例中,接触器包括形成为抵抗纵向压力弹性的多个线探针,靠近线探头的一端的第一对准器具有第一多个孔,线探针延伸穿过该第一多个孔,第一对准层对准线 探针到文本夹具的接触垫,靠近导线探针的另一端的第二对准器具有穿过线探头的第二多个孔延伸,第二对准层将线探针对准待测器件的接触垫, 以及在第一和第二对准器之间的绝缘层,当通过纵向压力压缩时,线探针延伸通过该绝缘层保持线探头。
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