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公开(公告)号：PT100692A
公开(公告)日：1994-05-31
申请号：PT10069292
申请日：1992-07-15
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.
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公开(公告)号：FR2683353A1
公开(公告)日：1993-05-07
申请号：FR9208504
申请日：1992-07-09
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: A MOSFET controlling multiplier for obtaining the precise function of the operational multiplication by offsetting the offset voltage of MOSFET to remove the non-linear current of MOSFET, utilizing symmetrical voltage sources and a current mirror circuit is disclosed. The MOSFET controlling multiplier utilizes a MOSFET linear means for linearly varying the output current I to a node A in accordance with an input voltage from an input voltage source Vg and a symmetrical input voltage from voltage sources Vx and -Vx. The input voltage from the input voltage source Vg is operatively associated with the symmetrical input voltage from the voltage sources Vx and -Vx. An impedance element Z outputs a voltage Vo, with the impedance element Z being connected to the node A of the MOSFET linear means and the ground.
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公开(公告)号：LU88148A1
公开(公告)日：1993-02-15
申请号：LU88148
申请日：1992-07-15
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
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公开(公告)号：DK81692D0
公开(公告)日：1992-06-19
申请号：DK81692
申请日：1992-06-19
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: A MOSFET analog multiplier with a variable resistive MOSFET linear means for linearly varying output current I depending upon a symmetrical input voltage from voltage sources V2 and -V2 and an input voltage from an input voltage source V1 operatively associated with the symmetrical input voltage from the voltage source V2 and -V2, with the variable resistive MOSFET linear means having a node A to output the varied output current I therethrough is disclosed. An operational amplifying unit for amplifying the linearly varied output current I and which includes an operational amplifier U with an inverting input terminal connected to the node A of the MOSFET linear means, a non-inverting input terminal connected to ground, and an output terminal. The operational amplifying unit further includes a feedback element Z connected between the inverting input terminal and the output terminal of the operational amplifier U, where in use the output terminal outputs a voltage Vo.
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公开(公告)号：GB2317981B
公开(公告)日：2000-09-20
申请号：GB9720979
申请日：1997-10-02
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: Control-type continuous ramp converting apparatus and method therefore. The present invention provides real-time processing of neurons in the neural network, easy implementation and reduction of manufacture cost of high density neurons in the neural network. The present invention comprises a first voltage controlling part for receiving a first voltage from an outside, and for non-linearly increasing a charged voltage in accordance with a differential continuous function of an exponential function; a second voltage controlling part for receiving a second voltage from an outside, and for non-linearly reducing a charged voltage in accordance with a differential continuous function of an exponential function; a charging part for charging an input current, and for providing the charged voltage of the charging part with the second voltage controlling part and an outside; and a plurality of switches for coupling outside and the first and the second voltage controlling part to the charging part, for selectively providing a third voltage from outside, an increased voltage and a decreased voltage based on the voltage of the charging part.
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Patent Agency Ranking
公开(公告)号：GB2317726B
公开(公告)日：2000-08-16
申请号：GB9720800
申请日：1997-09-30
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG , CHOI YOUNG JAE , KIM DAE HWAN
Abstract: A multiplier and a neural network synapse capable of removing nonlinear current using current mirror circuits. The multiplier produces a linear current by using MOS transistors operating in a nonsaturation region. The multiplier includes a first current mirror including a plurality of MOS transistors to form a first current and a second current mirror including a plurality of MOS transistors to form a second current, wherein the second current mirror is coupled in parallel to the first current mirror. As a result, the multiplier outputs an output current by subtracting a second current from said first current.
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公开(公告)号：FR2769430A1
公开(公告)日：1999-04-09
申请号：FR9712437
申请日：1997-10-06
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG , CHOI YOUNG JAE , KIM DAE HWAN
Abstract: The apparatus has a charging device that charges a current inputted from outside. A voltage comparing device compares the output voltage from the charging device with a reference voltage value and outputs a comparison result. A pulse extracting device generates and outputs pulses in response to the comparison result. A discharging device discharges the current through the charger in response to the output signal of the pulse extractor.
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公开(公告)号：GB2317981A
公开(公告)日：1998-04-08
申请号：GB9720979
申请日：1997-10-02
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: Capacitor C is initially charged by the input voltage or current via switch S1 and then switch S2 is closed so that the capacitor voltage is modified by the diode-connected MOS transistors M1 and M2, the final capacitor voltage being a sigmoid function of the initial capacitor voltage. The flat portions of the curve occur where the initial voltage is clamped by one of the transistors to a high or low level, the linear portion occurs when neither transistor conducts, and the transition regions A and B (figure 2b) occur when one transistor conducts in the subthreshold region. Because subthreshold MOS conduction has an exponential character, the shape of the transition regions A and B (figure 2b) may be described as a function of an exponential function.
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公开(公告)号：FR2754083A1
公开(公告)日：1998-04-03
申请号：FR9712220
申请日：1997-10-01
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: A multiplier capable of removing nonlinear current using current mirror circuits. The multiplier uses MOSFET and BJT devices by the BiCOMS processes. The multiplier includes three current mirror circuits. A first current mirror includes a BJT Q3 and a BJT Q5 and also the BJT Q3 is coupled in series to the n-channel MOSFET M1 between the voltage V1 and a ground voltage level. A second current mirror includes a BJT Q7 and a BJT Q8. A third current mirror includes a BJT Q4 and a BJT Q6. Consequently, input voltage signals V1 and Vdc applied to the n-channel MOSFETs M1 determine the current I1 and input voltage signals V1 and V2 applied to the n-channel MOSFET M2 determine the current I2.
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公开(公告)号：PT100693A
公开(公告)日：1994-05-31
申请号：PT10069392
申请日：1992-07-15
Applicant: KOREA TELECOMMUNICATION
Inventor： HAN IL SONG
Abstract: A MOSFET controlling multiplier for obtaining the precise function of the operational multiplication by offsetting the offset voltage of MOSFET to remove the non-linear current of MOSFET, utilizing symmetrical voltage sources and a current mirror circuit is disclosed. The MOSFET controlling multiplier utilizes a MOSFET linear means for linearly varying the output current I to a node A in accordance with an input voltage from an input voltage source Vg and a symmetrical input voltage from voltage sources Vx and -Vx. The input voltage from the input voltage source Vg is operatively associated with the symmetrical input voltage from the voltage sources Vx and -Vx. An impedance element Z outputs a voltage Vo, with the impedance element Z being connected to the node A of the MOSFET linear means and the ground.
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