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公开(公告)号：JPH09289236A
公开(公告)日：1997-11-04
申请号：JP10157696
申请日：1996-04-23
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor： YASUIKE NORIYUKI
Abstract: PROBLEM TO BE SOLVED: To provide characteristics measuring apparatus of a semiconductor pressure sensor capable of pressure characteristic measurement in the state where no semiconductor pressure sensor chip is packaged. SOLUTION: This device comprises a chip tray 7 in which a vent hole 7b is formed at its bottom and which has a plurality of accomodation parts 7a for accomodating the semiconductor pressure sensor chip 1 having a diaphragm, a chip tray alignment part 9 which supports a chip tray 7 and is positionable in the same flat plane as the chip tray 7, a measuring probe 3 movable perpendicularly to the flat plane, an electrical characteristic measuring part 2 for measuring electric characteristics through the measuring probe 3, and a pressurization part 8 capable of applying arbitrary pressure to the diaphragm of the semiconductor pressure sensor chip 1. Electric characteristics of the semiconductor pressure sensor chip 1 accomodated in the accomodation part 7a are measured with the electric characteristic measuring part 2 in the state where predetermined pressure is applied through a pressure introduction hole 8a of the pressurization part 8 via the vent hole 7b in the accomodation part 7a in which the semiconductor pressure sensor chip 1 is accomodated.
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公开(公告)号：JPH09288026A
公开(公告)日：1997-11-04
申请号：JP10078396
申请日：1996-04-23
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor： KENO TAKUJI , YASUDA MASAHARU , YASUIKE NORIYUKI
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor pressure sensor capable of suppressing the irregularity of a sensitivity by accurately controlling a diaphragm in a predetermined thickness. SOLUTION: Impurity is diffused from the one surface side of a silicon wafer 1 in a predetermined thickness of a diaphragm 2 at the position for forming the diaphragm 2 to provide an impurity diffused layer 3 having opposite conductivity type to the conductivity type of the wafer 1. Silicon oxide films 4 are formed on both the surfaces, the other surface side silicon oxide film is removed at the forming position of the diaphragm 2, an etching surface 41 is formed, then etched from the other surface side to form the diaphragm 2 at the one surface side of the wafer 1. The etching is stopped when the sensing output of sensing means for sensing the boundary between the layer 3 and the wafer 1 is existed, thereby inspecting the predetermined thickness of the diaphragm 2.
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公开(公告)号：JPH01186630A
公开(公告)日：1989-07-26
申请号：JP668588
申请日：1988-01-14
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor： MOUNO TAKUJI , ENDO SHUGO , YASUIKE NORIYUKI
IPC: H01L21/316 , H01L21/318
Abstract: PURPOSE:To prevent working of a withstand voltage improving area from deteriorating and improve reliability, by forming a silicate glass film only in a working area and forming a nitride film on the silicate film in the withstand voltage improving area. CONSTITUTION:In a withstand voltage improving area B in the vicinity of a working area A, as a passivation film, a nitride film 22 is formed on a glass film 21 of silicic acid. Therefore, moistureproofing effect is sufficient and a withstand voltage improving effect is not damaged. In the working area A, if passivation film is only the glass film 21 of silicic acid, this area has small effect on a withstand voltage, so that the withstand voltage does not deteriorate. As a result, reliability of a passivation film is improved and it is possible to obtain stability of withstand voltage characteristics for a long time.
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公开(公告)号：JPH01156677A
公开(公告)日：1989-06-20
申请号：JP31668287
申请日：1987-12-15
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor： YASUIKE NORIYUKI , ENDO SHUGO
Abstract: PURPOSE:To execute an acceleration test by connecting the load resistances of a large resistance value and a small resistance value in series to a semiconductor element to be tested so that both ends of the resistances of a large resistance can be short- circuited and giving alternately a high voltage application and a large current electric conduction to the semiconductor element to be tested. CONSTITUTION:Resistances R11-Rn1 of a small resistance value and resistances R12-Rn2 of a large resistance value are connected in series to semiconductor elements to be tested 41-4n, and also, contacts r11-rn2 are provided in order to short-circuit the resistances R12-Rn2 of a large resistance value. Moreover, power sources V1, V2 and contacts r01, r02 for giving a high voltage application and a large current electric conduction to these semiconductor elements 41-4n and resistances are provided. In this state, the semiconductor elements 41-4n are brought to ON/OFF control by a power source V3 and contacts r12-rn2, and the contacts r01, r02, and R11-Rn1 are controlled so that the large current electric conduction and the high voltage application are executed at the time of ON and at the time of OFF, respectively. In such a way, a semiconductor service life test having a large accelerating property can be executed.
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公开(公告)号：JP2006147630A
公开(公告)日：2006-06-08
申请号：JP2004331750
申请日：2004-11-16
Applicant: Matsushita Electric Works Ltd , 松下電工株式会社
Inventor： SAITO HIROSHI , YASUIKE NORIYUKI
CPC classification number: H01L2224/16225
Abstract: PROBLEM TO BE SOLVED: To evaluate poor bonding in face down mounting (surface mounting) semiconductor device, where the surface side of a semiconductor chip is connected with a mounting substrate. SOLUTION: When a semiconductor chip 10 is composed of a transparent material as in a light-emitting diode 1, made by forming gallium nitride based compound semiconductor layers 12 and 13 on a transparent sapphire substrate 11, an aperture window 30 that does not form electrodes 15 and 16 is formed at least partially at the abutting portion of gold bump electrodes 21a and 21b in the electrodes 15 and 16 being formed on the surface of the semiconductor chip 10 so that the joint of the electrodes 15, 16 and the gold bump electrodes 21a, 21b can be checked. A metal thin film 32 is formed of a material, having diffusion rate lower than that of gold in the aperture window 30. Consequently, the aperture window 30 appears gold in color after complete bonding, because the material of the metal thin film 32 thermally diffuses into the bump electrodes 21a, 21b. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract translation: 要解决的问题：为了评估半导体芯片的表面侧与安装基板连接的面朝下安装（表面安装）半导体器件的差的接合。 解决方案：当透明蓝宝石衬底11上形成氮化镓基化合物半导体层12和13而制成的半导体芯片10由发光二极管1中的透明材料构成时，形成孔径窗30 不形成电极15和16至少部分地形成在形成在半导体芯片10的表面上的电极15和16中的金凸块电极21a和21b的邻接部分处，使得电极15,16和 可以检查金凸块电极21a，21b。 金属薄膜32由孔径窗30的扩散速度低于金的材料形成。因此，由于金属薄膜32的材料热扩散，所以孔径窗30在完全粘合后呈现黄金色， 突出电极21a，21b。 版权所有（C）2006，JPO＆NCIPI
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Patent Agency Ranking26.发明专利
公开(公告)号：JP2002134432A
公开(公告)日：2002-05-10
申请号：JP2000327737
申请日：2000-10-26
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor： YASUDA MASAHARU , TAKAKURA NOBUYUKI , YASUIKE NORIYUKI
Abstract: PROBLEM TO BE SOLVED: To provide a metallization method which improves the productivity, without needing cleaning steps, drying step or pressure reducing steps. SOLUTION: A plasma 13, generated under a pressure near the atmospheric pressure, is supplied to the surface of a member 30 to rough the surface of the member 30. A metal film 31 is formed on the roughed surface of the member 30. This eliminates the need of a cleaning step, a drying step and a pressure reducing step necessary for roughening the surface, using sand blasting, a water solution of an oxidative acid or a plasma generated at a reduced pressure.
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公开(公告)号：JP2001308137A
公开(公告)日：2001-11-02
申请号：JP2000125181
申请日：2000-04-26
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor： TAKAKURA NOBUYUKI , YASUIKE NORIYUKI , KUZUHARA KAZUNARI , UEDA MICHIHIKO
IPC: H01L23/52 , H01L21/3205 , H01L21/60 , H01L21/768 , H01L23/522
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which has a long life and a high reliability by suppressing the increase in temperature of an aluminum bonding pad due to heat transmitted through a semiconductor substrate in the semiconductor device, to prevent the growth of voids or generation of corrosion in a joint between a gold wire and aluminum, and also provide a method of manufacturing the same. SOLUTION: In the semiconductor device having the aluminum bonding pad 3 on the semiconductor substrate 1, a heat insulation region 2 for shielding the heat transmitted to the bonding pad 3 through the semiconductor substrate 1 is formed of a heat insulation material, The semiconductor device is manufactured by a method wherein a wire bonding is carried out with a pad supporting section being supported by an auxiliary member from the rear face side and thereafter the auxiliary member is removed and then the heat insulation region is formed.
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公开(公告)号：JP2000337984A
公开(公告)日：2000-12-08
申请号：JP14573199
申请日：1999-05-26
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor： YASUIKE NORIYUKI , KENO TAKUJI , TAKAKURA NOBUYUKI , ARII YASUTAKA
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor pressure sensor having an improved fracture resistance. SOLUTION: A semiconductor pressure sensor is provided with a sensor chip 1 constituted by forming a gauge resistor 4 composed of a piezo-resistance element on the main surface side of a diaphragm 2 formed by providing a recessed section 3 by etching the rear surface of a silicon substrate, a glass pedestal 6 which has a through hole 5 communicating with the recessed section 3 and is anodically joined to the chip 1, and a pressure introducing pipe 7 which has a pressure introducing hole 8 communicating with the through hole 5 and to which the glass pedestal 6 is fixed. On the surface of the pipe 7 joined with the pedestal 6, a cover section 9 is erected so as to surround the side faces of the chip 1 and pedestal 6 and the side faces of the chip 1 and pedestal 6 are fixed to the pipe 7 with a brazing material.
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公开(公告)号：JPH11337433A
公开(公告)日：1999-12-10
申请号：JP14787598
申请日：1998-05-28
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor： YASUIKE NORIYUKI
Abstract: PROBLEM TO BE SOLVED: To prevent cracks in a supporting substrate due to the thermal contraction of solder and to provide a semiconductor pressure sensor with high reliability. SOLUTION: A semiconductor pressure sensor is formed by supporting and housing a semiconductor pressure sensor chip 1 with a diaphragm 11, which is formed in a thin-walled shape by the formation of a recessed part, in a package 3 via a supporting substrate with a through hole and by introducing pressure to the diaphragm 11 via the through hole. In the semiconductor pressure sensor, the supporting substrate is formed in a laminated structure by joining the first glass supporting substrate 2 to the second supporting substrate 20 formed of semiconductor material more resistant to cracks than glass. The upper surface of the first supporting substrate 2 is joined to the semiconductor pressure sensor chip 1, the lower surface of the first supporting substrate 2 is joined to the upper surface of the second supporting substrate 20, and the lower surface of the second supporting substrate 20 is joined to the package 3 by solder.
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公开(公告)号：JPH11337432A
公开(公告)日：1999-12-10
申请号：JP14787498
申请日：1998-05-28
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor： YASUIKE NORIYUKI
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor pressure sensor with satisfactory temperature characteristics capable of accurate pressure measurement. SOLUTION: A semiconductor pressure sensor is formed by supporting and housing a semiconductor pressure sensor chip 1 with a diaphragm 11, which is formed in a thin-walled shape by the formation of a recessed part, in the recessed part of a package 3 via a supporting substrate 20 by solder 6. In the semiconductor pressure sensor, metal thin films 21 and 32 are formed on one surface of the supporting substrate 20 and the side wall 33 of the recessed part of the package 3, the one surface of the supporting substrate 20 is joined to the side wall 33 of the recessed part of the package 3 by solder 6, and the other surface of the supporting substrate 20 is joined to the side surface of the semiconductor pressure sensor chip 1. By this, the semiconductor pressure sensor chip 1 is supported and housed in the recessed part of the package 3 via the supporting substrate 20.
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