公开(公告)号：JP2007019063A

公开(公告)日：2007-01-25

申请号：JP2005195868

申请日：2005-07-05

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： YASUIKE NORIYUKI ,  MAKINO SHIGERU ,  YAMADA SHUGO

IPC: H01L21/66 ,  B81C99/00 ,  G01N27/04 ,  H01L29/84

Abstract: PROBLEM TO BE SOLVED: To easily evaluate the cleanness of a jointing part and on a glass surface after anode bonding, in an inspection method for a structure of an acceleration sensor or the like in which glass is anode-bonded to a silicon substrate.
SOLUTION: An acceleration sensor 10 comprises a silicon substrate 1, two pieces of glass 3 and 2 that are anode-bonded on an under the silicon substrate 1, a cantilever 1a of cantilever beam structure that is formed in the silicon substrate 1, and a piezo resistance 4 formed on the surface of the silicon substrate 1. On the silicon substrate 1, two aluminum electrodes 6a and 6b so separated as to double as an inspection electrode are provided with inspection measurement terminals 6c and 6d in advance as an aluminum electrode for anode bonding of the upper part glass 3. A probe 9 is connected between the aluminum electrodes 6c and 6d for measuring insulation resistance using an insulation resistance tester 11. The cleanness on the glass surface is easily evaluated after anode bonding.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：为了容易地评价接合部的清洁度和阳极接合后的玻璃表面，在玻璃与硅阳极接合的加速度传感器等的结构的检查方法中， 基质。 解决方案：加速度传感器10包括硅衬底1，阳极接合在硅衬底1下面的两片玻璃3和2，形成在硅衬底1中的悬臂梁结构的悬臂1a 以及形成在硅基板1的表面上的压电电阻4.在硅基板1上，作为检查电极被分离为两个的两个铝电极6a和6b预先设置有检查测量端子6c和6d 用于上部玻璃的阳极接合的铝电极3.使用绝缘电阻测试仪11在铝电极6c和6d之间连接用于测量绝缘电阻的探针9。在阳极接合之后，容易评估玻璃表面的清洁度。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2002110735A

公开(公告)日：2002-04-12

申请号：JP2000293044

申请日：2000-09-26

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： YASUIKE NORIYUKI ,  YASUDA MASAHARU ,  SAWADA KOJI ,  KUZUHARA KAZUNARI

IPC: H01L23/12 ,  H01L21/56 ,  H01L21/60

Abstract: PROBLEM TO BE SOLVED: To provide a method for mounting a flip-chip that enables reinforcement effects of a bump and enables high sealing property of a gap between the semiconductor chip and a mounting substrate. SOLUTION: The semiconductor chip 14 and the mounting substrate 15 are connected with a bump 16. Then, by supplying plasma 13 blew by the plasma processing apparatus A into the gap 30 between the semiconductor chip 14 and the mounting substrate 15, the surface of semiconductor chip 14 and the surface of mounting substrate 15 and the surface of bump 16 are cleaned. Then, an underfill material is injected. Contaminations such as organic substances, by which a flow of the underfill material to be injected into the gap 30 is obstructed at injecting the underfill material, and by which an adhesion of the underfill material is obstructed, are removed by plasma processing.

公开(公告)号：JPH10107109A

公开(公告)日：1998-04-24

申请号：JP25457096

申请日：1996-09-26

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： YASUIKE NORIYUKI ,  YAMAMOTO HARUHIKO

IPC: G01P21/00 ,  G01P15/12 ,  G01R17/00 ,  G01R31/02 ,  G01R31/28 ,  H01L21/66

Abstract: PROBLEM TO BE SOLVED: To enable the subtle disconnection of a wiring formed on the stepped part of a semiconductor device to be well detected, by a method wherein a Wheatstone bridge circuit composed of four resistors the same in shape, dimension, and resistance is formed on the stepped part of the semiconductor device. SOLUTION: A Wheatstone bridge circuit composed of four resistors 2a to 2d the same in shape, dimension, and resistance is formed on the stepped parts 1a to 1d of a semiconductor device. For instance, the resistors 2a to 2d of aluminum wiring are formed on the stepped parts 1a to 1d of a silicon oxide film formed on a silicon substrate. The resistors 2a to 2d are the same in shape, dimension, and resistance. Furthermore, electrode pads 3a to 3d which are connected between the ends of the resistors 2a to 2d are provided, and the Wheatstone bridge is composed of the resistors 2a to 2d and the electrode pads 3a to 3d.

公开(公告)号：JPH1022354A

公开(公告)日：1998-01-23

申请号：JP16808096

申请日：1996-06-28

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： YASUIKE NORIYUKI

IPC: G01N21/88 ,  G01N21/956 ,  G01N27/00 ,  H01L21/66

Abstract: PROBLEM TO BE SOLVED: To provide a method for evaluating a junction state of an anode junction wafer with a high accuracy. SOLUTION: In this method, an anode junction wafer is evaluated by illuminating light 10a externally from a glass plate 2 on toward a junction between a semiconductor wafer 1 and the glass plate 2 in a specimen 3 where the glass plate 2 is anodically joined on a surface 1a of the semiconductor wafer 1 to evaluate the junction condition thereof. In this case, an anode junction part 1d of the semiconductor wafer 1 having the glass plate 1 anodically joined thereto in surface treated to previously form a surface treatment layer 1e of a PN junction, anodically joined, an electric path 9 for connecting the semiconductor wafer 1 and glass plate 2 is provided so that a current can flow in a thickness direction of the surface treatment layer 1e, and then the light 10a is illuminated toward the surface 1a of the wafer 1 to measure a current flowing through the electric path 9.

公开(公告)号：JPH0521576A

公开(公告)日：1993-01-29

申请号：JP17288191

申请日：1991-07-15

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： YASUIKE NORIYUKI

IPC: H01L21/66

Abstract: PURPOSE:To obtain a liquid crystal analysis method of semiconductor which method can increase the detection sensitivity of a fine leak current. CONSTITUTION:A transparent electrode 12 is composed of a transparent glass plate which is formed in a section protrusion type by forming step-differences 12a on both sides of the surface. The protrusion type surface is covered with an ITO film being transparent conducting material. A semiconductor specimen 4 whose surface is coated with liquid crystal 5 is mounted on the stand of a polarization microscope 3. In the state that the step-differences 12a on both sides are made the lower side, the transparent electrode 12 is mounted on the liquid crystal 5 coating the surface of the semiconductor specimen 4 on the stand of the polarization microscope 3, and faces the semiconductor specimen 4. At this time, the above step-differences 12a on both sides serve as the reliefs of probes 6 on both sides composed of bonding wires of the semiconductor specimen 4. A stabilized power supply part 15 applies a voltage to the semiconductor specimen 4 and the transparent electrode 12 via cables 9 and constitutes a bias circuit.

公开(公告)号：JPH04315067A

公开(公告)日：1992-11-06

申请号：JP8028591

申请日：1991-04-15

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： YASUDA MASAHARU ,  YASUIKE NORIYUKI

IPC: G01D21/00 ,  G01R31/26 ,  H01L21/66

Abstract: PURPOSE:To collect data without taking out an electric part to be tested from an environment testing tank. CONSTITUTION:A stable power supply 13 applying power to the electric part 11 to be tested received in a thermostatic/humidistatic tank 10, a data collecting apparatus 9 and an operational control part 6 controlling them are provided. By the order of the operational control part 15, the thermostatic/humidistatic tank 10 is repeatedly operated in a mode 1 wherein the temp. in the tank is 85 deg.C and the humidity therein is 85% and a mode 2 wherein the temp. in the tank is 25 deg.C and the humidity therein is 60%. At the time of the mode 1, the voltage of the withstand voltage ratio 80% of the electric part 11 to be tested is applied to the electric part 11 to be tested and, at the time of the mode 2, the voltage of the withstand voltage ratio 100% of the electric part 11 to be tested is applied to the electric part 1 to be tested. The data in both modes are sent to the data collecting apparatus 9. The measured result is transmitted to the operational control part 5 in the mode 2 and data are monitored in the mode 1.

公开(公告)号：JPH0230171A

公开(公告)日：1990-01-31

申请号：JP18076388

申请日：1988-07-19

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： YASUIKE NORIYUKI ,  ENDO SHUGO

IPC: H01L21/312 ,  H01L23/29 ,  H01L23/31

Abstract: PURPOSE:To obtain a semiconductor device provided with a protective film whose moistureproofness is sufficient and which can be manufactured easily by a method wherein a passivation film covering a substrate where a semiconductor element has been installed and a JCR film deposited on it are formed of a resin material of an identical system. CONSTITUTION:In a semiconductor device provided with a passivation film 2 covering a substrate 1 where a semiconductor element has been installed and with a JCR film 3 deposited on it, the passivation. film 2 and the JCR film 3 are formed of a resin material of an identical system. For example, a polyimide resin layer for a passivation film 2 is formed on a semiconductor wafer where a DMOSFET has been formed; a window is opened in a pad part for wire bonding use; the passivation film 2 is completed. Then, the wafer is diced and divided into chips; a mounting operation is executed; a die bonding process and a wire bonding process are executed; a thick polyimide resin layer for a JCR film 3 is formed again. Lastly, each chip is sealed completely with a sealing resin 4 composed of a silicone resin.

公开(公告)号：JP2006147631A

公开(公告)日：2006-06-08

申请号：JP2004331751

申请日：2004-11-16

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： SAITO HIROSHI ,  YASUIKE NORIYUKI

IPC: H01L21/60 ,  H01L33/32 ,  H01L33/62

CPC classification number: H01L2224/16225

Abstract: PROBLEM TO BE SOLVED: To evaluate defective bonding in facedown mounting (surface mounting type) semiconductor device where the surface side of a semiconductor chip is connected with a mounting substrate. SOLUTION: When a semiconductor chip 10 is composed of a transparent material similar to a light-emitting diode 1 made by forming gallium nitride based compound semiconductor layers 12 and 13 on a transparent sapphire substrate 11, grains 30 composed of a material harder than that of electrodes 15 and 16 are stuck to the abutting portion of a gold bump electrode 21 in the electrodes 15 and 16 formed on the surface of the semiconductor chip 10. Consequently, the junction of the electrodes 15, 16 and the gold bump electrode 21 can be evaluated from whether the grains 30 can be confirmed visually from the rear surface of the semiconductor chip 10. Consequently, chips of defective junction can be screened and forming conditions or bonding conditions of the bump electrode can be adjusted appropriately from the evaluation results. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：为了评估半导体芯片的表面侧与安装基板连接的面向安装（表面安装型）半导体器件的不良接合。 解决方案：当半导体芯片10由与通过在透明蓝宝石基板11上形成氮化镓基化合物半导体层12和13而制成的发光二极管1相似的透明材料构成时，由较硬的材料构成的晶粒30 比在电极15和16的电极15和16的接触部分粘附到形成在半导体芯片10的表面上的电极15和16中的金凸块电极21的邻接部分。因此，电极15,16与金凸块电极 可以从半导体芯片10的背面是否从目视上确认晶粒30是否可以评估图21所示的结果。因此，可以筛选不良结的芯片，并且可以从评估结果适当地调整凸块电极的形成条件或接合条件 。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005019530A

公开(公告)日：2005-01-20

申请号：JP2003179653

申请日：2003-06-24

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： YASUIKE NORIYUKI ,  TAKAKURA NOBUYUKI ,  KUZUHARA KAZUNARI ,  YASUDA MASAHARU ,  AKEDA TAKANORI

IPC: H01L29/41 ,  H01L33/32 ,  H01L33/38 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light emitting device which is high in light extraction efficiency. SOLUTION: The semiconductor light emitting device is equipped with a support substrate 1, a first conductivity-type semiconductor layer 2 provided on the support substrate 1, an active layer 3 provided on the first conductivity-type semiconductor layer 2 to serve as a light emitting layer, and a second conductivity-type semiconductor layer 4 provided on the active layer. Furthermore, at least two or more laminates 5 which are each composed of the active layer 3 and the second conductivity-type semiconductor layer 4 that are successively laminated on the first conductivity-type semiconductor layer 2, an exposed region 6 which is left exposed on the first conductivity-type semiconductor layer 2 when the laminates 5 are provided on the semiconductor layer 2, first electrodes 7 which are provided on the exposed region 6 to apply a voltage to the active layer 3 and to reflect light emitted from the side of the active layer 3 in the desired direction, and second electrodes 8 which are each provided on the second conductivity-type semiconductor layer 4 to supply a voltage to the active layer 3. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种光提取效率高的半导体发光器件。 解决方案：半导体发光器件配备有支撑基板1，设置在支撑基板1上的第一导电型半导体层2，设置在第一导电型半导体层2上的有源层3，用作 发光层和设置在有源层上的第二导电型半导体层4。 另外，由连续层叠在第一导电型半导体层2上的有源层3和第二导电型半导体层4构成的至少两层以上的层叠体5暴露于 当层叠体5设置在半导体层2上时的第一导电型半导体层2，设置在曝光区域6上以向有源层3施加电压并反射从侧面发射的光的第一电极7 活性层3在期望的方向上，第二电极8分别设置在第二导电类型半导体层4上以向有源层3提供电压。版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2002098711A

公开(公告)日：2002-04-05

申请号：JP2000291355

申请日：2000-09-26

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： SAITO HIROSHI ,  KAMI HIRONORI ,  ISHIDA TAKUO ,  AKAI SUMIO ,  TAKAKURA NOBUYUKI ,  YASUIKE NORIYUKI

IPC: G01P15/12 ,  G01P15/08 ,  H01L29/84

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor acceleration sensor and its manufacturing method capable of reducing a cost and heightening precision. SOLUTION: As for a sensing element 1 formed by supporting an overlapping part 5 rockably on a support part 16 through a bending part 4, the back side of the support part 16 is joined to a lower cap 3 which is a first cap by anode joint. The overlapping part 5 is formed more thinly than the support part 16 so as to form a rocking space between the lower cap 3 and the center part. An upper cap 2 made of silicon which is a second cap is joined to the lower cap 3 by the anode joint in addition to the sensing element 1. A recessed part 2a for storing the bending part 4 and the overlapping part 5 of the sensing element 1 between the upper cap 2 and the lower cap 3 is formed by anisotropic etching, and the peripheral part of the recessed part 2a is joined to the lower cap 3.