公开(公告)号：BR9509139A

公开(公告)日：1998-07-21

申请号：BR9509139

申请日：1995-09-19

Applicant: MOTOROLA INC

Inventor： TURNEY WILLIAM J ,  GAILUS PAUL H ,  CYGAN LAWRENCE F

IPC: H03F1/34 ,  H03G3/30 ,  H04B1/04

公开(公告)号：AT156314T

公开(公告)日：1997-08-15

申请号：AT91920047

申请日：1991-09-30

Applicant: MOTOROLA INC

Inventor： GAILUS PAUL H ,  YESTER FRANCIS R ,  TURNEY WILLIAM J

IPC: H03F1/34 ,  H03C3/08 ,  H03F1/32 ,  H03F3/24 ,  H04L27/36 ,  H03F1/36

Abstract: A linear transmitter having both an open loop and a closed loop training mode capability functions to schedule and facilitate these training modes in a manner that reduces adjacent channel splatter. A training waveform can be utilized to enhance these operational objectives. Scheduling of the open loop and closed loop training modes can be ordered, in a TDM system, in a variety of ways.

公开(公告)号：CA1292519C

公开(公告)日：1991-11-26

申请号：CA585306

申请日：1988-12-08

Applicant: MOTOROLA INC

Inventor： GAILUS PAUL H ,  TURNEY WILLIAM J ,  YESTER FRANCIS R JR

IPC: H03M3/00 ,  H03M3/02 ,  H03M3/04 ,  H04B1/10 ,  H04B14/06

Abstract: An improved apparatus and method for a sigma delta converter for bandpass signals is disclosed, suitable for use in mobile radio applications, between the front end and digital signal processing stages, that includes at least one bandpass filter, an n-level quantizer, an nlevel digital-to-analog (D/A) converter, and a direct current (DC) feedback network. The sigma delta converter for bandpass signals may be configured in a second order or a fourth order embodiment and achieves analog-to-digital conversion of a signal having a non-zero frequency carrier or suppressed carrier with improved signal-to-noise ratio performance and with minimal quantization error. As a result, the sigma delta conversion occurs earlier in a receiver chain and a dynamic range of about 95-98 dB is achieved.

公开(公告)号：EP1123609A4

公开(公告)日：2003-01-08

申请号：EP99970816

申请日：1999-10-14

Applicant: MOTOROLA INC

Inventor： MARTIN WILLIAM J ,  TURNEY WILLIAM J ,  GAILUS PAUL H ,  CLARK EDWARD T ,  DOREVITCH JOSHUA E ,  MANSFIELD TERRY K

IPC: H04B1/00 ,  H04B1/28 ,  H04L23/00

CPC classification number: H04B1/005 ,  H04B1/00 ,  H04B1/28

Abstract: An integrated sigma-delta radio frequency (RF) receiver subsystem (200) and method utilizes a multi-mode sigma-delta analog-to-digital converter (215) for providing a single and multi-bit output. A programmable decimation network (221) for reducing the frequency of the in-phase and quadrature bit stream and a programmable formatting network (223) are also used for organizing the in-phase and quadrature components from the decimation network (221) for subsequent signal processing. The invention offers a highly integrated digital/analog RF receiver back-end which incorporates integrated filtering and a smart gain control that is compatible for use with other receiver systems and offering superior performance characteristics.

公开(公告)号：EP1155499A4

公开(公告)日：2004-08-25

申请号：EP00976887

申请日：2000-11-02

Applicant: MOTOROLA INC

Inventor： GAILUS PAUL H ,  TURNEY WILLIAM J

IPC: H03F1/02 ,  H03F1/32 ,  H03F1/56 ,  H04L27/36

CPC classification number: H03F1/3247 ,  H03F1/0227 ,  H03F1/565 ,  H03F2200/102 ,  H04L27/368

Abstract: A method and apparatus is provided that amplitude modulates a modulated radio frequency (RF) signal (411) by modulating the supply voltage of a power amplifier (410). The method and apparatus further provide an impedance modulator (412) that reduces output signal (415) errors in response to an error signal generated by a feedback circuit (416) that includes a quadrature modulator (506), a limiter (520), a comparator (502), and a quadrature downconverter (510). Intermodulation distortion generated in the feedback circuit (416) by delay mismatches between amplitude and phase feedback paths, and non-linear effects of AM/PM conversion in a limiter (520), are suppressed by placing limiter (520) and quadrature downconverter (510) in a forward path of the overall amplifier loop.