公开(公告)号：CA2069513A1

公开(公告)日：1992-05-01

申请号：CA2069513

申请日：1991-09-30

Applicant: MOTOROLA INC

Inventor： GAILUS PAUL H ,  YESTER FRANCIS R ,  TURNEY WILLIAM J

IPC: H03F1/34 ,  H03C3/08 ,  H03F1/32 ,  H03F3/24 ,  H04L27/36

Abstract: A linear transmitter having both an open loop and a closed loop training mode capability functions to schedule and facilitate these training modes in a manner that reduces adjacent channel splatter. A training waveform can be utilized to enhance these operational objectives. Scheduling of the open loop and closed loop training modes can be ordered, in a TDM system, in a variety of ways.

公开(公告)号：ES2104732T3

公开(公告)日：1997-10-16

申请号：ES91920047

申请日：1991-09-30

Applicant: MOTOROLA INC

Inventor： GAILUS PAUL H ,  YESTER FRANCIS R ,  TURNEY WILLIAM J

IPC: H03F1/34 ,  H03C3/08 ,  H03F1/32 ,  H03F3/24 ,  H04L27/36 ,  H03F1/36

Abstract: A linear transmitter having both an open loop and a closed loop training mode capability functions to schedule and facilitate these training modes in a manner that reduces adjacent channel splatter. A training waveform can be utilized to enhance these operational objectives. Scheduling of the open loop and closed loop training modes can be ordered, in a TDM system, in a variety of ways.

公开(公告)号：CA1318358C

公开(公告)日：1993-05-25

申请号：CA616314

申请日：1992-02-19

Applicant: MOTOROLA INC

Inventor： JANC ROBERT V ,  JASPER STEVEN C ,  LONGLEY LESTER A ,  LAMBERT KATHERINE H ,  TURNEY WILLIAM J ,  LILLIE ROSS J

IPC: H03D1/24 ,  H04B1/10 ,  H04L7/00 ,  H04L23/02

Abstract: DIGITAL RADIO FREQUENCY RECEIVER A digital radio receiver is described. The digital receiver (100) of the present invention contemplates a digital radio receiver which operates on a received analog signal which has been converter to a digital form after preselection at the output of the antenna. The digital receiver (100) of the present invention comprises a preselector (106), a high-speed analog-to-digital (A/D) converter (108), a digitally implemented intermediate-frequency (IF) selectivity section (110) having an output signal at substantially baseband frequencies, and digital signal processor (DSP)circuit (120) performing demodulation and audio filtering. The radio architecture of the present invention is programmably adaptable to virtually every known modulation scheme and is particularly suitable for implementation on integrated circuits.

公开(公告)号：CA1304786C

公开(公告)日：1992-07-07

申请号：CA517169

申请日：1986-08-29

Applicant: MOTOROLA INC

Inventor： JANC ROBERT V ,  JASPER STEVEN C ,  LONGLEY LESTER A ,  LAMBERT KATHERINE H ,  TURNEY WILLIAM J ,  LILLIE ROSS J

IPC: H03H17/02 ,  H03D1/22 ,  H03D3/00 ,  H04B1/26 ,  H04B14/04 ,  H03D1/24 ,  H04L7/00 ,  H04L23/02 ,  H04B1/10

Abstract: DIGITAL RADIO FREQUENCY RECEIVER A digital radio receiver is described. The digital receiver (100) of the present invention contemplates a digital radio receiver which operates on a received analog signal which has been converted to a digital form after preselection at the output of the antenna. The digital receiver (100) of the present invention comprises a preselector (106), a high-speed analog-to-digital (A/D) converter (108), a digitally implemented intermediate-frequency (IF) selectivity section (110) having an output signal at substantially baseband frequencies, and digital signal processor (DSP)circuit (120) performing demodulation and audio filtering. The radio architecture of the present invention is programmably adaptable to virtually every known modulation scheme and is particularly suitable for implementation on integrated circuits.

公开(公告)号：AU8903391A

公开(公告)日：1992-05-26

申请号：AU8903391

申请日：1991-09-30

Applicant: MOTOROLA INC

Inventor： GAILUS PAUL H ,  YESTER FRANCIS R ,  TURNEY WILLIAM J

IPC: H03F1/34 ,  H03C3/08 ,  H03F1/32 ,  H03F3/24 ,  H04L27/36 ,  H03F1/36

Abstract: A linear transmitter having both an open loop and a closed loop training mode capability functions to schedule and facilitate these training modes in a manner that reduces adjacent channel splatter. A training waveform can be utilized to enhance these operational objectives. Scheduling of the open loop and closed loop training modes can be ordered, in a TDM system, in a variety of ways.

公开(公告)号：DE69935173T2

公开(公告)日：2007-12-20

申请号：DE69935173

申请日：1999-10-14

Applicant: MOTOROLA INC

Inventor： MARTIN WILLIAM J ,  TURNEY WILLIAM J ,  GAILUS PAUL H ,  CLARK EDWARD T ,  DOREVITCH JOSHUA E ,  MANSFIELD TERRY K

IPC: H04B1/28 ,  H04B1/00

Abstract: An integrated sigma-delta radio frequency (RF) receiver subsystem (200) and method utilizes a multi-mode sigma-delta analog-to-digital converter (215) for providing a single and multi-bit output. A programmable decimation network (221) for reducing the frequency of the in-phase and quadrature bit stream and a programmable formatting network (223) are also used for organizing the in-phase and quadrature components from the decimation network (221) for subsequent signal processing. The invention offers a highly integrated digital/analog RF receiver back-end which incorporates integrated filtering and a smart gain control that is compatible for use with other receiver systems and offering superior performance characteristics.

公开(公告)号：AT354213T

公开(公告)日：2007-03-15

申请号：AT04100346

申请日：1999-10-14

Applicant: MOTOROLA INC

Inventor： MARTIN WILLIAM J ,  TURNEY WILLIAM J ,  GAILUS PAUL H ,  CLARK EDWARD T ,  DOREVITCH JOSHUA E ,  MANSFIELD TERRY K

IPC: H04B1/00 ,  H04B1/28

Abstract: An integrated sigma-delta radio frequency (RF) receiver subsystem (200) and method utilizes a multi-mode sigma-delta analog-to-digital converter (215) for providing a single and multi-bit output. A programmable decimation network (221) for reducing the frequency of the in-phase and quadrature bit stream and a programmable formatting network (223) are also used for organizing the in-phase and quadrature components from the decimation network (221) for subsequent signal processing. The invention offers a highly integrated digital/analog RF receiver back-end which incorporates integrated filtering and a smart gain control that is compatible for use with other receiver systems and offering superior performance characteristics.

公开(公告)号：CA2371792C

公开(公告)日：2005-05-17

申请号：CA2371792

申请日：2000-11-02

Applicant: MOTOROLA INC

Inventor： GAILUS PAUL H ,  TURNEY WILLIAM J

IPC: H03F1/02 ,  H03F1/32 ,  H03F1/56 ,  H04L27/36 ,  H04B1/04

Abstract: A method and apparatus is provided that amplitude modulates a modulated radi o frequency (RF) signal (411) by modulating the supply voltage of a power amplifier (410). The method and apparatus further provide an impedance modulator (412) that reduces output signal (415) errors in response to an error signal generated by a feedback circuit (416) that includes a quadratur e modulator (506), a limiter (520), a comparator (502), and a quadrature downconverter (510). Intermodulation distortion generated in the feedback circuit (416) by delay mismatches between amplitude and phase feedback paths , and non-linear effects of AM/PM conversion in a limiter (520), are suppresse d by placing limiter (520) and quadrature downconverter (510) in a forward pat h of the overall amplifier loop.

公开(公告)号：HK1047206A1

公开(公告)日：2003-02-07

申请号：HK02108765

申请日：2002-12-03

Applicant: MOTOROLA INC

Inventor： MARTIN WILLIAM J ,  TURNEY WILLIAM J ,  GAILUS PAUL H ,  CLARK EDWARD T ,  DOREVITCH JOSHUA E ,  MANSFIELD TERRY K

IPC: H04B1/00 ,  H04B1/28 ,  H04L

Abstract: An integrated sigma-delta radio frequency (RF) receiver subsystem (200) and method utilizes a multi-mode sigma-delta analog-to-digital converter (215) for providing a single and multi-bit output. A programmable decimation network (221) for reducing the frequency of the in-phase and quadrature bit stream and a programmable formatting network (223) are also used for organizing the in-phase and quadrature components from the decimation network (221) for subsequent signal processing. The invention offers a highly integrated digital/analog RF receiver back-end which incorporates integrated filtering and a smart gain control that is compatible for use with other receiver systems and offering superior performance characteristics.

公开(公告)号：BRPI0008250B1

公开(公告)日：2016-11-22

申请号：BR0008250

申请日：2000-11-02

Applicant: GOOGLE TECHNOLOGY HOLDINGS LLC ,  MOTOROLA MOBILITY INC ,  MOTOROLA MOBILITY LLC ,  MOTOROLA SOLUTIONS INC ,  MOTOROLA INC

Inventor： GAILUS PAUL H ,  TURNEY WILLIAM J

IPC: H03F1/02 ,  H03F1/32 ,  H03F1/56 ,  H04L27/36

Abstract: "método e aparelho para amplificação linear de um sinal de radiofreqüência". um método e aparelho é fornecido que modula por amplitude um sinal de rf (radiofreqüência) modulado (411) pela modulação da voltagem de suprimento de um amplificador de potência (410). o método e aparelho ainda fornece um modulador de impedância (412) que reduz erros de sinal de saída (415) em resposta a um sinal de erro gerado por um circuito de retroalimentação (416) que inclui um modulador de quadratura (506), um limitador (520), um comparador (502) e um conversor de descida de quadratura (510). a distorção de intermodulação gerada no circuito de retroalimentação (416) pelos desencontros de retardo entre as vias de amplitude e de retroalimentação de fase, e os efeitos não lineares da conversão am/pm em um limitador (520) são suprimidos colocando-se o limitador (520) e o conversor de descida de quadratura (510) em uma via à frente do loop do amplificador geral.