公开(公告)号：AU5335699A

公开(公告)日：2000-02-28

申请号：AU5335699

申请日：1999-08-04

Applicant: QUALCOMM INC

Inventor： HANSQUINE DAVID

IPC: H03M13/41 ,  H04L1/00 ,  H03M13/00

公开(公告)号：MXPA02003937A

公开(公告)日：2002-12-13

申请号：MXPA02003937

申请日：2000-10-23

Applicant: QUALCOMM INC

Inventor： HANSQUINE DAVID

IPC: G06F11/10 ,  G06F7/38 ,  H03M13/41

Abstract: Se expone un sistema para realizar una operacion mariposa de agregar-comparar- seleccionar (ACS) en una implementacion del algoritmo Viterbi. El sistema incluye un primer elemento de memoria (145) para almacenar una pluralidad de metricas del estado fuente; un multiplexor (670) que es capaz de seleccionar entre una primera y segunda trayectorias de operacion con base en ritmos pares e impares, un mecanismo ACS (600), que calcula las metricas del estado blanco para cada una de las metricas del estado fuente. Se utiliza una segunda memoria acoplada al mecanismo ACS y el multiplexor, para almacenar temporalmente las metricas blanco. Por lo tanto, el multiplexor selecciona la primera trayectoria de operacion durante los ritmos pares y suministra las metricas del estado fuente desde la primera memoria hacia el mecanismo ACS para generar las metricas del estado blanco. Durante los ritmos impares, el multiplexor selecciona la segunda trayectoria de operacion para tener acceso a la segunda memoria y utilizar las metricas del estado blanco calculadas anteriormente, como las metricas del estado fuente intermedio.

公开(公告)号：HK1043886A1

公开(公告)日：2002-09-27

申请号：HK02105490

申请日：2002-07-25

Applicant: QUALCOMM INC

Inventor： HANSQUINE DAVID

IPC: H04J3/00 ,  H03M20060101 ,  H03M13/27 ,  H04B20060101 ,  H04B7/26 ,  H04L12/54 ,  H03M ,  H04B

Abstract: A voice and data communication system and method for receiving symbols for a plurality of channels into chunks included within buffers, each chunk holding symbols for only a corresponding one of the plurality of channels. As complete frames are received and decoded, the chunks holding the symbols, that are decoded, are freed up to be used for reception of newly arriving symbols included in newly arriving frames.

公开(公告)号：HK1038449A1

公开(公告)日：2002-03-15

申请号：HK02100088

申请日：2002-01-07

Applicant: QUALCOMM INC

Inventor： HANSQUINE DAVID

IPC: H03M13/00 ,  H03M13/41 ,  G06F11/10 ,  H04L1/00 ,  H03M ,  H04L

Abstract: A serial Viterbi decoder having a chainback cache is provided for use in a mobile telephone. In one embodiment described herein, the decoder includes a branch error metric block, an add-compare-select unit, and a chainback block including a chainback RAM, a full chainback cache and chainback controller circuitry. The chainback cache caches decision bits from previous process cycles such that full chainback operations need not always be performed. The chainback cache is configured to cache on all reads. With the chainback cache, significant savings in power consumption and processing time may be achieved with only a relatively modest increase in the amount of circuitry required. In another embodiment, a full chainback cache is not provided. Rather, the chainback block instead includes an L+1 bit RAM, an updown counter and a shift register configured to emulate a chainback cache. In still another embodiment, an L bit shift register is employed instead of the combination of the L+1 bit RAM and updown counter. In the various embodiments, the chainback block may be configured to perform only one chainback read in each process cycle or may be configured to perform m chainback reads in each process cycle. In still other embodiments, the chainback block is configured to perform chainback operations based on a through b reads where the cache is accessed for each read after a reads have been done until b reads have been performed or a match is obtained. In still further embodiments, the chainback block is configured to perform chainback operations over multiple process cycles rather than only a single process cycle.

公开(公告)号：CA2349456A1

公开(公告)日：2000-05-11

申请号：CA2349456

申请日：1999-11-05

Applicant: QUALCOMM INC

Inventor： HANSQUINE DAVID

IPC: H04J3/00 ,  H03M20060101 ,  H03M13/27 ,  H04B20060101 ,  H04B7/26 ,  H04L12/54 ,  H04B1/707

Abstract: A voice and data communication system and method for receiving symbols for a plurality of channels into chunks included within buffers, each chunk holdin g symbols for only a corresponding one of the plurality of channels. As comple te frames are received and decoded, the chunks holding the symbols, that are decoded, are freed up to be used for reception of newly arriving symbols included in newly arriving frames.

公开(公告)号：ZA987927B

公开(公告)日：1999-03-01

申请号：ZA987927

申请日：1998-08-31

Applicant: QUALCOMM INC

Inventor： BUTLER BRIAN K ,  BAYLEY GWAIN ,  HANSQUINE DAVID ,  TIEDEMANN EDWARD G JR

IPC: H03M13/41 ,  H04L1/00 ,  H03K ,  G06F ,  G09C ,  H04B ,  H04L

公开(公告)号：WO0028777A3

公开(公告)日：2000-10-05

申请号：PCT/US9926786

申请日：1999-11-10

Applicant: QUALCOMM INC

Inventor： HANSQUINE DAVID ,  AGRAWAL AVNEESH

IPC: G06F9/46 ,  G06F20060101 ,  G06F15/173 ,  H04J3/02 ,  H04J3/16 ,  H04M3/00 ,  H04Q3/545 ,  H04Q11/00 ,  H04Q11/08

CPC classification number: G06F9/50

Abstract: A resource allocator for allocating at least two different types of hardware resources for users within a communication system, wherein the system supports up to a first predetermined number of users of one particular type and a second predetermined number of users of a second particular type. The resource allocator provides a mapping of resources, either from fixed resources to shared resources or from shared resources to fixed resources, which is both cost effective and transparent to software.

Abstract translation: 一种资源分配器，用于为通信系统内的用户分配至少两种不同类型的硬件资源，其中该系统支持一种特定类型的第一预定数量的用户和第二特定类型的第二预定数量的用户。 资源分配器提供资源映射，无论是从固定资源到共享资源，还是从共享资源到固定资源，这对于软件来说既具成本效益又透明。

公开(公告)号：WO0027036A9

公开(公告)日：2000-09-28

申请号：PCT/US9926182

申请日：1999-11-05

Applicant: QUALCOMM INC ,  HANSQUINE DAVID

Inventor： HANSQUINE DAVID

IPC: H04J3/00 ,  H03M20060101 ,  H03M13/27 ,  H04B20060101 ,  H04B7/26 ,  H04L12/54 ,  H04B1/707

CPC classification number: H03M13/2782 ,  H03M13/2785

Abstract: A voice and data communication system and method for receiving symbols for a plurality of channels into chunks included within buffers, each chunk holding symbols for only a corresponding one of the plurality of channels. As complete frames are received and decoded, the chunks holding the symbols, that are decoded, are freed up to be used for reception of newly arriving symbols included in newly arriving frames.

Abstract translation: 一种语音和数据通信系统和方法，用于将多个信道的符号接收到包括在缓冲器内的块，每个块仅保存多个信道中对应的一个信道的符号。 当接收和解码完整的帧时，保存被解码的符号的块被释放以用于接收新到达的帧中包括的新到达的符号。

公开(公告)号：WO0027036A2

公开(公告)日：2000-05-11

申请号：PCT/US9926182

申请日：1999-11-05

Applicant: QUALCOMM INC ,  HANSQUINE DAVID

Inventor： HANSQUINE DAVID

IPC: H04J3/00 ,  H03M20060101 ,  H03M13/27 ,  H04B20060101 ,  H04B7/26 ,  H04L12/54

CPC classification number: H03M13/2782 ,  H03M13/2785

Abstract: A voice and data communication system and method for receiving symbols for a plurality of channels into chunks included within buffers, each chunk holding symbols for only a corresponding one of the plurality of channels. As complete frames are received and decoded, the chunks holding the symbols, that are decoded, are freed up to be used for reception of newly arriving symbols included in newly arriving frames.

Abstract translation: 一种语音和数据通信系统和方法，用于将多个信道的符号接收到包含在缓冲器内的组块中，每个组块仅保存用于多个信道中对应的一个信道的符号。 当完整帧被接收和解码时，保持被解码的符号的块被释放以用于接收包含在新到达帧中的新到达符号。