公开(公告)号：US09472697B2

公开(公告)日：2016-10-18

申请号：US14596993

申请日：2015-01-14

Applicant: RAYTHEON COMPANY

Inventor： Justin Gordon Adams Wehner ,  Edward Peter Gordon Smith

IPC: H01L31/00 ,  H01L31/101 ,  H01L31/0232 ,  H01L27/142 ,  H01L31/04 ,  H01L31/09

CPC classification number: H01L31/02327 ,  H01L27/142 ,  H01L27/1446 ,  H01L31/00 ,  H01L31/02325 ,  H01L31/04 ,  H01L31/09 ,  H01L31/1013 ,  H01L31/102

Abstract: Methods and structures for providing single-color or multi-color photo-detectors leveraging plasmon resonance for performance benefits. In one example, a radiation detector includes a semiconductor absorber layer having a first electrical conductivity type and an energy bandgap responsive to radiation in a first spectral region, a semiconductor collector layer coupled to the absorber layer and having a second electrical conductivity type, and a plasmonic resonator coupled to the collector layer and having a periodic structure including a plurality of features arranged in a regularly repeating pattern.

公开(公告)号：US20160086998A1

公开(公告)日：2016-03-24

申请号：US14947575

申请日：2015-11-20

Applicant: Raytheon Company

Inventor： John J. Drab ,  Justin Gordon Adams Wehner ,  Christian M. Boemler

IPC: H01L27/146 ,  H01L31/105

CPC classification number: H01L27/14643 ,  H01L27/1446 ,  H01L27/14605 ,  H01L27/14649 ,  H01L27/14689 ,  H01L29/868 ,  H01L31/105

Abstract: A semiconductor structure having: a silicon structure; and a plurality of laterally spaced PiN diodes formed in the silicon structure; and a surface of the silicon structure configured to reduce reverse bias leakage current through the PiN diodes. In one embodiment, a gate electrode structures is disposed on a surface of the silicon structure, the gate electrode structure having portions disposed between adjacent pairs of the diodes, the gate structure being biased to prevent leakage current through the diodes.

公开(公告)号：US20240255782A1

公开(公告)日：2024-08-01

申请号：US18601291

申请日：2024-03-11

Applicant: Raytheon Company

Inventor： Jamal I. Mustafa ,  Justin Gordon Adams Wehner ,  Christopher R. Koontz

IPC: G02F1/017

CPC classification number: G02F1/017 ,  G02F2203/11 ,  G02F2203/52

Abstract: A method is provided for operating one or more one solid-state electro-optic device to provide an electrically switching shutter. The method includes forming an alternating stack of first semiconductor layers having a first dopant and second semiconductor layers having a second dopant to form at least one superlattice semiconductor device. The method further includes applying to the at least one superlattice semiconductor device a first voltage to induce a transparent state of the alternating stack such that light is transmitted through the alternating stack, and applying to the at least one superlattice semiconductor device a second voltage different from the first voltage to induce an opaque state of the alternating stack such that light is inhibited from passing through the alternating stack.

公开(公告)号：US20240055466A1

公开(公告)日：2024-02-15

申请号：US18494163

申请日：2023-10-25

Applicant: Raytheon Company

Inventor： Eric Miller ,  Christian M. Boemler ,  Justin Gordon Adams Wehner ,  Drew Fairbanks ,  Sean P. Kilcoyne

IPC: H01L27/146 ,  H01L27/148 ,  H01L23/498 ,  H01L21/311 ,  H01L23/488 ,  H01L23/48 ,  H01L23/485 ,  H04N25/75

CPC classification number: H01L27/1469 ,  H01L27/14685 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/148 ,  H01L23/49827 ,  H01L21/311 ,  H01L27/1462 ,  H01L23/488 ,  H01L23/481 ,  H01L27/14632 ,  H01L23/485 ,  H04N25/75

Abstract: Methods and apparatus for an assembly having directly bonded first and second wafers where the assembly includes a backside surface and a front side surface. The first wafer includes IO signal connections vertically routed to the direct bonding interface by a first one of the bonding posts on the first wafer bonded to a first one of the bonding posts on the second wafer. The second wafer includes vertical routing of the IO signal connections from first one though the bonding posts on the second wafer to IO pads on a backside surface of the assembly.

公开(公告)号：US11886095B2

公开(公告)日：2024-01-30

申请号：US17721884

申请日：2022-04-15

Applicant: Raytheon Company

Inventor： Christopher Casimir Brough ,  Sean P. Kilcoyne ,  Richard Wahl ,  Thomas Yengst ,  Justin Gordon Adams Wehner

IPC: G02F1/295

CPC classification number: G02F1/2955

Abstract: A scalable independent unit cell device architecture may include a phase-shifting element and a phase shift driver both integrated within the unit cell device. The phase shift driver may be coupled to the phase-shifting element and the phase shift driver may independently control the phase-shifting element to produce an optical beam having a desired phase. The unit cell device may further include an optical antenna that outputs the beam having the desired phase. The unit cell device may be formed as an opto-electronic hybrid optimized to leverage direct bond hybridization (DBH) to attach an electronic integrated circuit wafer to a side of a photonic integrated circuit wafer. The resulting unit cell device (i.e., 24 microns) may tightly integrate individual element-level phase control, which may be implemented within large-scale two-dimensional photonic arrays with hemispherical beam steering.

公开(公告)号：US11837623B2

公开(公告)日：2023-12-05

申请号：US17068223

申请日：2020-10-12

Applicant: Raytheon Company

Inventor： Eric Miller ,  Christian M. Boemler ,  Justin Gordon Adams Wehner ,  Drew Fairbanks ,  Sean P. Kilcoyne

IPC: H01L27/146 ,  H01L27/148 ,  H01L23/498 ,  H01L21/311 ,  H01L23/488 ,  H01L23/48 ,  H01L23/485 ,  H04N25/75

CPC classification number: H01L27/1469 ,  H01L21/311 ,  H01L23/481 ,  H01L23/485 ,  H01L23/488 ,  H01L23/49827 ,  H01L27/148 ,  H01L27/1462 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14685 ,  H04N25/75

Abstract: Methods and apparatus for an assembly having directly bonded first and second wafers where the assembly includes a backside surface and a front side surface. The first wafer includes IO signal connections vertically routed to the direct bonding interface by a first one of the bonding posts on the first wafer bonded to a first one of the bonding posts on the second wafer. The second wafer includes vertical routing of the IO signal connections from first one though the bonding posts on the second wafer to IO pads on a backside surface of the assembly.

公开(公告)号：US20230333442A1

公开(公告)日：2023-10-19

申请号：US17721884

申请日：2022-04-15

Applicant: Raytheon Company

Inventor： Christopher Casimir Brough ,  Sean P. Kilcoyne ,  Richard Wahl ,  Thomas Yengst ,  Justin Gordon Adams Wehner

IPC: G02F1/295

CPC classification number: G02F1/2955

Abstract: A scalable independent unit cell device architecture may include a phase-shifting element and a phase shift driver both integrated within the unit cell device. The phase shift driver may be coupled to the phase-shifting element and the phase shift driver may independently control the phase-shifting element to produce an optical beam having a desired phase. The unit cell device may further include an optical antenna that outputs the beam having the desired phase. The unit cell device may be formed as an opto-electronic hybrid optimized to leverage direct bond hybridization (DBH) to attach an electronic integrated circuit wafer to a side of a photonic integrated circuit wafer. The resulting unit cell device (i.e., 24 microns) may tightly integrate individual element-level phase control, which may be implemented within large-scale two-dimensional photonic arrays with hemispherical beam steering.

公开(公告)号：US20170131475A1

公开(公告)日：2017-05-11

申请号：US14938361

申请日：2015-11-11

Applicant: RAYTHEON COMPANY

Inventor： Justin Gordon Adams Wehner ,  Duane D. Smith ,  Edward Peter Gordon Smith ,  Adam M. Kennedy

IPC: G02B6/293 ,  G02F1/157

CPC classification number: G02B6/29395 ,  G01J5/045 ,  G01J5/0831 ,  G01J5/522 ,  G02B6/29358 ,  G02B6/29389 ,  G02F1/157 ,  G02F2203/11 ,  H01L27/00 ,  H01L28/00 ,  H04N17/002

Abstract: A scene projector including an array of light emitting pixels, a tunable filter element, and a spatial light modulator. The tunable filter element is optically coupled to the array of light emitting pixels such that light emitted from the array of light emitting pixels is passed through the tunable filter element as filtered light. The spatial light modulator is optically coupled to the array of light emitting pixels and is configured to generate transmitted light by interacting with the filtered light to control at least one of an amplitude, a phase, and a polarization of the filtered light.

公开(公告)号：US20160181448A1

公开(公告)日：2016-06-23

申请号：US14596993

申请日：2015-01-14

Applicant: RAYTHEON COMPANY

Inventor： Justin Gordon Adams Wehner ,  Edward Peter Gordon Smith

IPC: H01L31/0232 ,  H01L31/101

CPC classification number: H01L31/02327 ,  H01L27/142 ,  H01L27/1446 ,  H01L31/00 ,  H01L31/02325 ,  H01L31/04 ,  H01L31/09 ,  H01L31/1013 ,  H01L31/102

Abstract: Methods and structures for providing single-color or multi-color photo-detectors leveraging plasmon resonance for performance benefits. In one example, a radiation detector includes a semiconductor absorber layer having a first electrical conductivity type and an energy bandgap responsive to radiation in a first spectral region, a semiconductor collector layer coupled to the absorber layer and having a second electrical conductivity type, and a plasmonic resonator coupled to the collector layer and having a periodic structure including a plurality of features arranged in a regularly repeating pattern.

公开(公告)号：US09224768B2

公开(公告)日：2015-12-29

申请号：US13959081

申请日：2013-08-05

Applicant: Raytheon Company

Inventor： John J. Drab ,  Justin Gordon Adams Wehner ,  Christian M. Boemler

IPC: H01L27/146 ,  H01L29/868 ,  H01L27/144 ,  H01L31/105

CPC classification number: H01L27/14643 ,  H01L27/1446 ,  H01L27/14605 ,  H01L27/14649 ,  H01L27/14689 ,  H01L29/868 ,  H01L31/105

Abstract: A semiconductor structure having: a silicon structure; and a plurality of laterally spaced PiN diodes formed in the silicon structure; and a surface of the silicon structure configured to reduce reverse bias leakage current through the PiN diodes. In one embodiment, a gate electrode structures is disposed on a surface of the silicon structure, the gate electrode structure having portions disposed between adjacent pairs of the diodes, the gate structure being biased to prevent leakage current through the diodes.

Abstract translation: 一种半导体结构，具有：硅结构; 以及形成在所述硅结构中的多个横向间隔开的PiN二极管; 并且所述硅结构的表面被配置为减少穿过所述PiN二极管的反向偏置漏电流。 在一个实施例中，栅极电极结构设置在硅结构的表面上，栅极电极结构具有设置在相邻的二极管对之间的部分，栅极结构被偏置以防止通过二极管的漏电流。