公开(公告)号：JP2000031304A

公开(公告)日：2000-01-28

申请号：JP19781798

申请日：1998-07-13

Applicant: SONY CORP

Inventor： NOMOTO KAZUMASA ,  FUJIWARA ICHIRO

IPC: H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide a memory element which does not consume much electric power and in which information can be written and erased at high speeds. SOLUTION: A charge storing layer 15 is formed on a conductive area 13 through an insulating layer 14a, and a gate electrode 16 is formed on the storing layer 15 through another insulating layer 14b. Then probability modulating electrodes 17 are formed on the side sections of the storing layer 15 through insulating layers 14d. The thickness of the insulating layer 14a is adjusted to such a value that changes can tunnel their ways through the layer 14a, and the thicknesses of the insulating layers 14b and 14d are adjusted to such thicknesses that the charges cannot easily tunnel their ways through the layers 14b and 14d. At the time of writing and erasing information, a potential is impressed not only upon the gate electrode 16 but also upon the probability modulating electrodes 17. Consequently, the tunneling probability of the changes between the conductive area 13 and charge storing layer 15 is spatially modulated and the tunneling probability of the charges is remarkably increased. Therefore, information can be written and erased at high speed with a low voltage.

公开(公告)号：JPH09120593A

公开(公告)日：1997-05-06

申请号：JP6569796

申请日：1996-03-22

Applicant: SONY CORP

Inventor： FUJIWARA ICHIRO ,  MACHIDA AKIO ,  KOJIMA SHIGERU

IPC: G01Q60/10 ,  G01Q60/30 ,  G01Q80/00 ,  G11B9/00 ,  G11B9/02 ,  G11B9/06 ,  G11B9/08 ,  G11B9/14 ,  G11B11/08

Abstract: PROBLEM TO BE SOLVED: To obtain an excellent high density recording and reproducing device by reproducing information recorded by a head under the state of noncontact with a recording medium in a prescribed area in detecting a changing quantity of electric charge or capacitance or surface potential. SOLUTION: A recording head HR is composed of a leaf spring in a narrowplate shape or the like formed with an acicular electrode 21 in a conical shape, a triangular pyramidal shape or prismatic shape having a cross section of a triangle, etc., at the tip, capable of point contact or microarea contact with the recording medium, and is constituted of a cantilever 22 whose one end is fixed. This cantilever 22 consists of Si of a spring constant 0.01 to 10N/m or SiN, and high electric conductivity is imparted to the cantilever by coating its surface with a metal layer or metal layers in a single layer or multilayer structure of Au, Pt, Co, Ni, Ir, Cr, etc. The recording medium 10 is placed on a placing base 30, and is moved, for instance, in the directions of x-axis y-axis, which are orthogonal to each other or is rotated, while the placing base 30 is controllable of moving in the direction of z-axis which is perpendicular to the surface direction of the recording medium 10, so as to adjust a state of contact with the acicular electrode 21.

公开(公告)号：JPH0997457A

公开(公告)日：1997-04-08

申请号：JP25382295

申请日：1995-09-29

Applicant: SONY CORP

Inventor： FUJIWARA ICHIRO

IPC: G11B9/02 ,  G01Q60/24 ,  G01Q80/00 ,  G11B9/14 ,  H01L49/00

Abstract: PROBLEM TO BE SOLVED: To perform fast recording with a high recording density and fast reproduction by applying a voltage from a head consisting of a stylus electrode or detecting variation of electric charges or capacity. SOLUTION: The recording head HR is composed of a cantilever 22 having striped leaf spring constitution wherein the stylus electrode which can come into point-contact with a recording medium is formed atop, and has its one end fixed. To record or erase information, the amount of a space charge layer is controlled by applying the voltage from the head HR and causing the polarization inversion of a specific area on the recording medium 10. For reproduction, on the other hand, information in the space charge layer in the specific area is detected as the quantity of variation of electric charge or capacity of this area.

公开(公告)号：JPH08124148A

公开(公告)日：1996-05-17

申请号：JP25783494

申请日：1994-10-24

Applicant: SONY CORP

Inventor： MACHIDA AKIO ,  FUJIWARA ICHIRO

IPC: G11B5/72 ,  G11B5/725 ,  G11B5/84

Abstract: PURPOSE: To produce a magnetic recording medium capable of ensuring superior running performance, corrosion resistance and durability and well adaptable to the attainment of high density recording. CONSTITUTION: At least a magnetic layer 2 is formed on a nonmagnetic substrate 1 and a thin film made of a mixed phase contg. a metal oxide, a hydroxide and a chelate compd. formed by heat treatment at a low temp. included in a sol-gel method is formed as a protective film 3 on the magnetic layer 2. At the time of forming this protective film 3, a sol-gel soln. using 2- methoxyethanol as the solvent is used in the sol-gel method and the pH of the soln. is preferably adjusted to 4-7.

公开(公告)号：JPH06342517A

公开(公告)日：1994-12-13

申请号：JP35142293

申请日：1993-12-28

Applicant: SONY CORP

Inventor： KAMEI TAKAHIRO ,  TANAKA KOICHI ,  FUJIWARA ICHIRO ,  KAWAKADO KOICHI

IPC: C07F7/28 ,  C10M107/54 ,  C10N40/18 ,  G11B5/64 ,  G11B5/71 ,  G11B5/73

Abstract: PURPOSE:To obtain a magnetic recording medium enhanced in traveling property, wear resistance and durability even in a severe environment by applying a titanates coupling agent expressed by a specified constitutional formula on the surface of a carbon protective layer. CONSTITUTION:The magnetic recording medium is formed by laminating a magnetic layer, the carbon protective layer, etc., on a nonmagnetic substrate. When the titanates coupling agent being the lubricating agent expressed by constitutional formula is applied on the carbon protective layer, the magnetic recording medium enhanced in traveling property, wear resistance and durability even in the severe environment such as high temp., high humidity and low temp. is obtained. In the formula, R is a 3-6C linear or branch hydrocarbon group, R is a 3-30C linear or branch hydrocarbon group and n is 1 or 2.

公开(公告)号：JP2007103640A

公开(公告)日：2007-04-19

申请号：JP2005291084

申请日：2005-10-04

Applicant: Sony Corp ,  ソニー株式会社

Inventor： FUJIWARA ICHIRO ,  SHIMOKAWABE KENJI

IPC: H01L21/8247 ,  H01L27/10 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To achieve a non-volatile memory allowing effective implantation of hot-electrons under low voltage condition. SOLUTION: A memory transistor has a semiconductor substrate (for example, well W), first and second source-drain regions SSL, SBL, a bottom insulating film BTM, a charge accumulating film CHS, a top insulating film TOP, and a gate electrode (for example, word line WL). The bottom insulating film BTM is lower than the barrier height of SiO 2 and Si in its barrier height for a channel forming region and/or has been subjected to the high temperature nitriding process. A memory peripheral circuit generates a first voltage (drain voltage Vd) and a second voltage (gate voltage Vg), applies Vd to the second source-drain region SBL and Vg to the word line WL during the data writing operation, and implants the hot-electron HE secondarily generated due to collision by electrolytic dissociation to the charge accumulating film CHS from the side of the second source-drain region SBL. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：实现非易失性存储器，允许在低电压条件下有效地注入热电子。 解决方案：存储晶体管具有半导体衬底（例如阱W），第一和第二源极 - 漏极区域SSL，SBL，底部绝缘膜BTM，电荷累积膜CHS，顶部绝缘膜TOP和 栅电极（例如，字线WL）。 底部绝缘膜BTM低于SiO 2 的势垒高度，并且在沟道形成区域的阻挡高度为Si，和/或已进行高温氮化处理。 存储器外围电路产生第一电压（漏极电压Vd）和第二电压（栅极电压Vg），在数据写入操作期间将Vd施加到字线WL的第二源极 - 漏极区域SBL和Vg，并且将热 电子HE由于从第二源极 - 漏极区域SBL的侧面通过电解离解碰撞到电荷累积膜CHS而二次产生。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2006157050A

公开(公告)日：2006-06-15

申请号：JP2006042739

申请日：2006-02-20

Applicant: Sony Corp ,  ソニー株式会社

Inventor： FUJIWARA ICHIRO ,  HAYASHI YUTAKA

IPC: H01L21/8247 ,  G11C16/02 ,  G11C16/04 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To improve the disturbance characteristics of a memory element which include a dispersed charge storing means. SOLUTION: A nonvolatile semiconductor memory device is provided with a write-inhibit voltage supply means 20 for supplying the source regions 2 and/or drain regions 4 of non-selected memory elements (memory transistors M21, M22), connected to common lines (BL2 and SL2) other than those (BL1 and SL1) to which a selected memory element (memory transistor M11) is connected in a write period with a reverse bias voltage, that makes the source and/or drain regions reverse biased, with respect to the channel-forming regions 1a via the common lines (BL2 and SL2); and a non-selected wordline biasing means 22 for supplying the non-selected wordline WL2, with a gate bias voltage that is higher than the potential of the channel forming regions 1a, when the conductivity type of the channel forming regions 1a is p-type, and is lower than the potential of the channel forming regions 1a, when the conductivity type is an n-type. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提高包括分散电荷存储装置的存储元件的干扰特性。 解决方案：非易失性半导体存储器件设置有写入禁止电压供给装置20，用于提供连接到公共端的未选择存储元件（存储晶体管M21，M22）的源极区域2和/或漏极区域4 （BL2和SL2）与选择的存储元件（存储晶体管M11）在写入周期中连接的那些（BL1和SL1），其中反向偏置电压使源极和/或漏极区域反向偏置， 相对于通道形成区域1a经由公共线（BL2和SL2）; 以及当通道形成区域1a的导电类型为p型时，用于向未选择字线WL2提供栅极偏置电压高于沟道形成区域1a的电位的未选择字线偏置装置22 ，并且当导电类型为n型时，低于沟道形成区域1a的电位。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005317117A

公开(公告)日：2005-11-10

申请号：JP2004134281

申请日：2004-04-28

Applicant: Sony Corp ,  ソニー株式会社

Inventor： FUJIWARA ICHIRO

IPC: G11C16/02 ,  G11C16/04 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To reduce maximum operating voltage and power consumption for a discrete trap memory. SOLUTION: Electron is injected in a charge storage film 12, the charge distribution is made even, and data is deleted. In writing the data, voltage with direction where a source area (SBL1) becomes a positive polarity side and a gate electrode (WL1) becomes a negative electrode side is impressed between the source area (SBL1) and the gate electrode (WL1). In this process, holes which are minor carriers for the source area (SBL1) are injected into the charge storage film 12 from the source side, and the amount of the charges in the source side parts 12s of the charge storage film 12 is relatively shifted to the positive polarity side 12d for other parts of the charge storage film. Threshold voltage is lowered by this. The writing is performed from the source side in this operation method without forming a channel, so that the maximum operating voltage and the power consumption are lower. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：降低离散陷阱存储器的最大工作电压和功耗。 解决方案：将电子注入电荷存储膜12中，使电荷分布均匀，数据被删除。 在源区域（SBL1）和栅电极（WL1）之间写入数据时，施加源极区域（SBL1）变为正极侧的方向的电压和栅电极（WL1）成为负极侧。 在这个过程中，作为源极区（SBL1）的次载流子的孔从源极被注入到电荷存储膜12中，并且电荷存储膜12的源极侧部分12s中的电荷量相对偏移 到电极保存膜的其它部分的正极侧12d。 阈值电压由此降低。 在该操作方法中从源侧执行写入而不形成通道，使得最大工作电压和功耗较低。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005057106A

公开(公告)日：2005-03-03

申请号：JP2003287417

申请日：2003-08-06

Applicant: Sony Corp ,  ソニー株式会社

Inventor： FUJIWARA ICHIRO ,  NAKAGAWARA AKIRA

IPC: G11C16/04 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide a non volatile semiconductor memory device for making an application voltage at the time of writing data lower than that in conventional channel hot electron injection by providing a memory transistor with a single layer gate structure for injecting hot electrons due to ionization collision, for example, secondary ionization collision into a floating gate, for improving the injecting efficiency of the hot electrons at the time of providing a high concentration channel area, and for reducing a voltage and a method for injecting the charge. SOLUTION: This non volatile semiconductor memory device is provided with a floating gate 29 constituted of a single polysilicon layer, two source/drain areas 23 and 24, a control gate 30 constituted of an impurity area formed in a p-type well 21 and a voltage supply circuit. The voltage supply circuit supplies a write drain voltage to the two source/drain areas 23 and 24 at the time of writing data, and supplies a write gate voltage to the control gate 30. Thus, it is possible to inject hot electron HE due to secondary ionization collision generated at the source/drain area 24 side serving as the drain to the flowing gate 29. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种非易失性半导体存储器件，用于通过提供具有用于注入热的单层栅极结构的存储晶体管，在写入数据时低于常规通道热电子注入时的施加电压 由于电离碰撞引起的电子，例如二次电离碰撞成浮栅，用于提高高浓度通道面积时的热电子注入效率，降低电压和注入电荷的方法。 解决方案：该非易失性半导体存储器件设置有由单个多晶硅层，两个源极/漏极区域23和24构成的浮动栅极29，由形成在p型阱中的杂质区域构成的控制栅极30 21和电压供给电路。 电压供给电路在写入数据时向两个源极/漏极区域23和24提供写入漏极电压，并且向控制栅极30提供写入栅极电压。因此，可以由于 在作为漏极的源极/漏极区域24侧产生的二次电离碰撞到流动门29。版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004214506A

公开(公告)日：2004-07-29

申请号：JP2003001403

申请日：2003-01-07

Applicant: Sony Corp ,  ソニー株式会社

Inventor： FUJIWARA ICHIRO

IPC: G11C16/02 ,  G11C16/04 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide a nonvolatile memory, where charge injection efficiency is high, local break cannot be easily introduced to a dielectric film when erasing, and data rewrite characteristics are excellent. SOLUTION: When data are written, a write drain voltage is applied to a second source-drain region SBL with potential in a first source-drain region SSL as a reference, a write gate voltage is applied to a gate electrode WL, hot electrons caused by ionization collisions are generated at the side of the second source-drain region SBL, and the generated hot electrons are injected to a charge accumulating film GD from the side of the second source-drain region SBL, thus accumulating electrons at a local section (storage section). Additionally, when the data are erased, an erasure voltage having the maximum of 6V is applied and a hole (h) is injected to the charge accumulation film GD including the storage section by direct tunnel effect. COPYRIGHT: (C)2004,JPO&NCIPI