公开(公告)号：JPH118317A

公开(公告)日：1999-01-12

申请号：JP15665497

申请日：1997-06-13

Applicant: SONY CORP

Inventor： KATAOKA TOYOTAKA

IPC: H01L27/092 ,  H01L21/8238

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device and a method for manufacturing it, in which variation in a threshold voltage and current driving ability of an n-channel MOS transistor in a CMOS transistor is suppressed, and current drive ability of a p-channel MOS transistor is improved. SOLUTION: In a CMOSLSI, a gate insulation film 5 of an n-channel MOS transistor and a gate insulation film 10 of a p-channel MOS transistor are constituted of a Si oxide nitride film. The gate insulation film 5 has a peak of distribution for nitrogen concentration near an interface between a Si substrate 1 and the gate insulation film 5. In the gate insulation film 10, nitrogen concentration near an interface between the gate insulation film 10 and a gate electrode 11 is made higher than that near an interface between the Si substrate 1, is formed by oxidizing substrate after nitriding the surface of the substrate Si, and the gate insulation film 10. The gate insulation film 5 is formed by heat-treating the Si substrate 1 in an N2 O gas atmosphere.

公开(公告)号：JPH10199878A

公开(公告)日：1998-07-31

申请号：JP514297

申请日：1997-01-16

Applicant: SONY CORP

Inventor： KATAOKA TOYOTAKA

IPC: H01L29/78 ,  H01L21/318

Abstract: PROBLEM TO BE SOLVED: To obtain a semiconductor device having a thin gate insulation film, having no distribution peak of N at the back surface but having a N concn. sufficiently high to avoid diffusion of B. SOLUTION: By heat-treating in an NO atmosphere a thin nitride oxide film 13 having a high N concn. on the surface of a semiconductor, a substrate 11 is formed. By oxidizing, this film 13 is oxidized and grown at the back surface to form a gate insulating film 13a of the grown film 13. This provides a distribution peak of N at the front surface of the gate insulating film 13a. An MOS transistor having this thin insulation film 13a has a threshold voltage stabilized by blocking B from diffusion, and its current drive power is suppressed from deteriorating, because of the distribution peak of N located at the front surface of the gate insulating film 13a.

公开(公告)号：JPH1098038A

公开(公告)日：1998-04-14

申请号：JP26925496

申请日：1996-09-19

Applicant: SONY CORP

Inventor： KATAOKA TOYOTAKA

IPC: H01L21/316

Abstract: PROBLEM TO BE SOLVED: To stably form a thin silicon oxide film by a method, wherein electromagnetic waves are applied to a gas, containing hydrogen and oxygen, and a base body is oxidized in a gas atmosphere containing water vapor which is produced. SOLUTION: Oxygen gas and hydrogen gas are introduced in a water vapor producing chamber 20 via pipings 21 and 22 and microwaves, which are generated in a magnetron 10, such as of a frequency of 2.45GHz of microwaves, are irradiated on gas containing the oxygen gas and the hydrogen gas via a waveguide 11. An oxygen plasma and a hydrogen plasma are produced, the oxygen plasma is reacted to the hydrogen plasma and water vapor, which is produced under a reduced pressure, is introduced in an oxidation reaction chamber 30 via a piping 24. After the chamber 30 has been filled with the water capor, a silicon semiconductor substrate on a substrate placement stage 31 is heated by heating lamps 32, whereby a thin silicon oxide film is formed under a reduced pressure by a moistening oxidation method.

公开(公告)号：JPH09205137A

公开(公告)日：1997-08-05

申请号：JP1127196

申请日：1996-01-25

Applicant: SONY CORP

Inventor： KATAOKA TOYOTAKA ,  SUZUKI TOSHIHIKO

IPC: H01L21/76

Abstract: PROBLEM TO BE SOLVED: To make it possible to form an excellent element isolation region by simultaneously forming wider various element isolation region from the element isolation region of a quarter micron width by forming a plurality of trenches at a wide element isolation region forming part, and altering a semiconductor substrate between the trenches to an insulating film. SOLUTION: Element isolation regions 1, 2 having different widths are simultaneously formed on a semiconductor substrate 11. In this case, one trench 22 of a predetermined width WT is formed on the narrow element isolation region forming part of the substrate 11 and a plurality of trenches 22 of a predetermined width WT are formed at a predetermined interval WS, on the wide elemet isolation forming part. Then, the heat treatment of forming the insulating film by the thermal reaction of any of oxidative gas and oxy-nitriding gas with the substrate 11 is conducted until the substrate 11a between the trenches 22 of the forming part is altered to an insulatilng film 23, and the trenches 22 are embedded with te film 23. For example, the predetermined width WS between the trenches 22 is set to about 0.91 times as large as the width WT of the trenches 22.

公开(公告)号：JPH08213611A

公开(公告)日：1996-08-20

申请号：JP4247795

申请日：1995-02-07

Applicant: SONY CORP

Inventor： KATAOKA TOYOTAKA

IPC: H01L21/8247 ,  H01L21/318 ,  H01L21/336 ,  H01L21/768 ,  H01L23/522 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792

Abstract: PURPOSE: To realize a semiconductor device having ONO type insulating film of high breakdown strength by a method wherein the ONO type gate insulating film is reformed by thermal oxidizing an SiO2 film of the third layer formed by CVD process meeting specific requirements. CONSTITUTION: In the three layer structured insulating film 14, after the formation of the first layer SiO2 film 16 by thermal oxidizing process of a silicon substrate 10, the second layer SiN layer 18 and the third SiO2 layer are successively formed by CVD process to be maintained in oxygen atmosphere meeting the temperature requirement at 800 deg.C-1150 deg.C for 0.5-5 minutes for thermal oxidizing the third layer. Next, a gate electrode 22 mad of polysilicon 22a and WSix film 22b is formed and ion-implanted to form source/drain regions further to form an interlayer insulating film 24 for making a contact hole 26 on the source/ drain region. Accordingly, by forming a wiring layer 28 and an electrode 30 after heat treatment, the breakdown strength characteristics can be enhanced by the reformation not adversely affecting the underlying layer of the ONO structure insulating film.

公开(公告)号：JPH06168696A

公开(公告)日：1994-06-14

申请号：JP34106192

申请日：1992-11-30

Applicant: SONY CORP

Inventor： KATAOKA TOYOTAKA

IPC: H01J37/147 ,  H01J37/317 ,  H01L21/265

Abstract: PURPOSE:To implant ions in different areas of a single wafer under different ion implantation conditions without causing metal pollusion or the like by arranging a deflecting means to deflect an ion beam according to its necessity. CONSTITUTION:Newly in a conventional device, a deflecting means 30 is arranged between an accelerating tube 14 and an Y-axis direction scanning means 16, and a beam damping part 32 is also arranged between the deflecting means 30 and the Y-axis direction scanning means 16. When ions are implanted in a silicon substrate 20, since voltage is not impressed upon the deflecting means 30, an ion beam collides with the substrate 20 and is implanted without being influenced by the deflecting means at all. When the ions are not implanted in the substrate 20, voltage is impressed upon the deflecting means 30. Thereby, the ion beam is deflected, and is discharged to the beam damping part 32, and the ion beam does not reach the substrate, and is not implanted. Thereby, ion implantation condition different areas can be formed easily in a single wafer by operating the deflecting means.

公开(公告)号：JPH05315556A

公开(公告)日：1993-11-26

申请号：JP11725392

申请日：1992-05-11

Applicant: SONY CORP

Inventor： NOGUCHI TAKASHI ,  KATAOKA TOYOTAKA

IPC: H01L21/265 ,  H01L21/22 ,  H01L21/8238 ,  H01L27/092

Abstract: PURPOSE:To provide a method of manufacturing a complementary MOS semiconductor device, where a shallow junction can be realized and a resist mask is lessened in frequency of use. CONSTITUTION:When a certain conductivity type MOS transistor and an opposite conductivity type MOS transistor are formed on the same substrate 1, corresponding impurity ions are implanted into either of element forming regions, a light transmitting insulating film 11 is formed on the element forming region concerned, all the surface of the substrate is subjected to an excimer laser doping process using the insulating film 11 as a mask, impurity ions of opposite conductivity are implanted into the other element forming region in a self-aligned manner, and the impurity-ion implanted regions 6a and 6b are annealed.

公开(公告)号：JP2013089871A

公开(公告)日：2013-05-13

申请号：JP2011230920

申请日：2011-10-20

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KATAOKA TOYOTAKA ,  UMEBAYASHI HIROSHI

IPC: H01L27/146 ,  H01L27/14

Abstract: PROBLEM TO BE SOLVED: To reduce the size of a chip region to be diced in a solid state imaging device wafer, in which the plurality of chip regions, respectively including rear surface radiation type solid state imaging devices, are aligned, thereby downsizing the solid state imaging device.SOLUTION: A solid state image device wafer 100-1 includes: multiple chip regions 200; a division region 300 which is disposed enclosing the chip regions 200; photoelectric conversion parts 20 respectively provided at the chip regions 200; driving circuits, each of which is provided on the surface side opposite to a light receiving surface A relative to the photoelectric conversion part 20 in each chip region 200; device terminals 33, each of which connects with the driving circuit and is led out to the surface side in each chip region 200; and inspection terminals 400, each of which connects with the driving circuit and is exposed to the light receiving surface A side in the division region 300.

Abstract translation: 要解决的问题为了减少在分别包括后表面辐射型固态成像装置的多个芯片区域对准的固态成像装置晶片中要切割的芯片区域的尺寸，由此 固态成像装置小型化。 解决方案：固态图像器件晶片100-1包括：多个芯片区域200; 设置在芯片区域200周围的划分区域300; 分别设置在芯片区域200处的光电转换部件20; 驱动电路，其各自设置在每个芯片区域200中相对于光电转换部20的与光接收面A相反的表面侧; 器件端子33，其各自与驱动电路连接并被引出到每个芯片区域200中的表面侧; 以及检查端子400，每个检测端子400与驱动电路连接并且暴露于分区300中的受光面A侧。版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2007194337A

公开(公告)日：2007-08-02

申请号：JP2006009882

申请日：2006-01-18

Applicant: Sony Corp ,  ソニー株式会社

Inventor： HIYAMA SUSUMU ,  KATAOKA TOYOTAKA

IPC: H01L29/78 ,  H01L21/205 ,  H01L21/8238 ,  H01L27/092

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device for improving reliability of device, and also to provide a method for manufacturing the same.
SOLUTION: A p-type MOS transistor 21 is formed to provide, as a channel region 21c, a region including a plane (111) as the facet plane where hole mobility is larger as the carrier mobility than the plane (100) as the principal plane of the semiconductor substrate 11 in an epitaxial growth film layer 112.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于提高器件可靠性的半导体器件，并且还提供一种用于制造器件的方法。 解决方案：形成p型MOS晶体管21作为沟道区21c，提供包括作为载流子迁移率的空穴迁移率大于平面（100）的平面（111）的平面的区域， 作为外延生长膜层112中的半导体衬底11的主平面。（C）2007，JPO＆INPIT

公开(公告)号：JP2003109953A

公开(公告)日：2003-04-11

申请号：JP2001306153

申请日：2001-10-02

Applicant: SONY CORP

Inventor： KATAOKA TOYOTAKA ,  SAITO MASAKI

IPC: H01L29/78 ,  H01L21/318

Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a silicon nitride film exhibiting excellent reliability, and a method for forming a gate insulation film in which boron atoms can be prevented from being diffused from the gate electrode into a silicon semiconductor substrate, and a method for forming a gate insulation film. SOLUTION: The method for forming a silicon nitride film comprises a step for forming a silicon film on a basic material using a silicon compound gas containing no hydrogen as a material gas, and a step for supplying a nitrogen gas or a nitrogen compound gas containing no hydrogen above the silicon film and nitriding the silicon film by irradiating it with electromagnetic waves. A silicon nitride film exhibiting excellent reliability where hydrogen is not diffused from the silicon nitride film into other adjacent members can be formed using the silicon nitride film formed by this method.